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UT54ACS14PVAH

Description
IC,LOGIC GATE,HEX INVERTER,CMOS, RAD HARD,DIP,14PIN,CERAMIC
Categorylogic    logic   
File Size225KB,9 Pages
ManufacturerCobham PLC
Download Datasheet Parametric View All

UT54ACS14PVAH Overview

IC,LOGIC GATE,HEX INVERTER,CMOS, RAD HARD,DIP,14PIN,CERAMIC

UT54ACS14PVAH Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerCobham PLC
package instructionDIP, DIP14,.3
Reach Compliance Codeunknown
JESD-30 codeR-XDIP-T14
JESD-609 codee0
Logic integrated circuit typeINVERTER
MaximumI(ol)0.0001 A
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
power supply5 V
Prop。Delay @ Nom-Sup14 ns
Certification statusNot Qualified
Schmitt triggerYES
Filter level38535V;38534K;883S
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
total dose1M Rad(Si) V
Standard Products
UT54ACS14/UT54ACTS14
Hex Inverting Schmitt Triggers
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
1.2μ
CMOS (ACTS14) and 0.6μ CRH CMOS process
(ACS14)
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 14-pin DIP
- 14-lead flatpack
UT54ACS14 - SMD 5962-96524
UT54ACTS14 - SMD 5962-96525
DESCRIPTION
The UT54ACS14 and the UT54ACTS14 are hex inverters. The
circuits perform the Boolean function Y = A.
The devices are characterized over full military temperature
range of -55°C to +125°C.
FUNCTION TABLE
INPUT
A
H
L
OUTPUT
Y
L
H
PINOUTS
14-Pin DIP
Top View
A1
Y1
A2
Y2
A3
Y3
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
A6
Y6
A5
Y5
A4
Y4
14-Lead Flatpack
Top View
A1
Y1
A2
Y2
A3
Y3
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
A6
Y6
A5
Y5
A4
Y4
LOGIC DIAGRAM
A1
Y1
LOGIC SYMBOL
A1
A2
A3
A4
A5
A6
(1)
(3)
(5)
(9)
(11)
(13)
1
(2)
(4)
(6)
(8)
(10)
(12)
Y1
Y2
Y3
Y4
Y5
Y6
A5
Y5
A4
Y4
A3
Y3
A2
Y2
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and
IEC Publication 617-12.
A6
Y6
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