EEWORLDEEWORLDEEWORLD

Part Number

Search

SN74LS175M

Description
LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, EIAJ, SOP-16
Categorylogic    logic   
File Size108KB,8 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
Download Datasheet Parametric Compare View All

SN74LS175M Overview

LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, EIAJ, SOP-16

SN74LS175M Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeSOIC
package instructionSOP,
Contacts16
Reach Compliance Codeunknown
seriesLS
JESD-30 codeR-PDSO-G16
JESD-609 codee4
length10.2 mm
Logic integrated circuit typeD FLIP-FLOP
Number of digits4
Number of functions1
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
propagation delay (tpd)25 ns
Certification statusNot Qualified
Maximum seat height2.05 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Trigger typePOSITIVE EDGE
width5.275 mm
minfmax30 MHz
SN74LS175
Quad D Flip-Flop
The LSTTL / MSI SN74LS175 is a high speed Quad D Flip-Flop.
The device is useful for general flip-flop requirements where clock
and clear inputs are common. The information on the D inputs is
stored during the LOW to HIGH clock transition. Both true and
complemented outputs of each flip-flop are provided. A Master Reset
input resets all flip-flops, independent of the Clock or D inputs, when
LOW.
The LS175 is fabricated with the Schottky barrier diode process for
high speed and is completely compatible with all ON Semiconductor
TTL families.
http://onsemi.com
LOW
POWER
SCHOTTKY
Edge-Triggered D-Type Inputs
Buffered-Positive Edge-Triggered Clock
Clock to Output Delays of 30 ns
Asynchronous Common Reset
True and Complement Output
Input Clamp Diodes Limit High Speed Termination Effects
16
1
GUARANTEED OPERATING RANGES
Symbol
V
CC
T
A
I
OH
I
OL
Parameter
Supply Voltage
Operating Ambient
Temperature Range
Output Current – High
Output Current – Low
Min
4.75
0
Typ
5.0
25
Max
5.25
70
– 0.4
8.0
Unit
V
°C
mA
mA
PLASTIC
N SUFFIX
CASE 648
16
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device
SN74LS175N
SN74LS175D
Package
16 Pin DIP
16 Pin
Shipping
2000 Units/Box
2500/Tape & Reel
©
Semiconductor Components Industries, LLC, 1999
1
December, 1999 – Rev. 6
Publication Order Number:
SN74LS175/D

SN74LS175M Related Products

SN74LS175M SN74LS175DR2 SN74LS175MEL
Description LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, EIAJ, SOP-16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SOIC-16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, EIAJ, SOP-16
Is it Rohs certified? conform to incompatible conform to
Maker ON Semiconductor ON Semiconductor ON Semiconductor
Parts packaging code SOIC SOIC SOIC
package instruction SOP, PLASTIC, SOIC-16 SOP,
Contacts 16 16 16
Reach Compliance Code unknown not_compliant unknown
series LS LS LS
JESD-30 code R-PDSO-G16 R-PDSO-G16 R-PDSO-G16
JESD-609 code e4 e0 e4
length 10.2 mm 9.9 mm 10.2 mm
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP
Number of digits 4 4 4
Number of functions 1 1 1
Number of terminals 16 16 16
Maximum operating temperature 70 °C 70 °C 70 °C
Output polarity COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP SOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
propagation delay (tpd) 25 ns 25 ns 25 ns
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 2.05 mm 1.75 mm 2.05 mm
Maximum supply voltage (Vsup) 5.25 V 5.25 V 5.25 V
Minimum supply voltage (Vsup) 4.75 V 4.75 V 4.75 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V
surface mount YES YES YES
technology TTL TTL TTL
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Tin/Lead (Sn/Pb) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL
Trigger type POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
width 5.275 mm 3.9 mm 5.275 mm
minfmax 30 MHz 30 MHz 30 MHz
I disassembled a device but couldn't find any information. Can you help me analyze the three electrodes?
My two pictures were taken from a scrapped machine CBE...
btty038 Making friends through disassembly
[MicroPython netizens’ doubts] Products developed with it are easily copied
Do you have this doubt? It is easy to develop products with scripting languages. What do you do? {:1_95:}...
nmg MicroPython Open Source section
BTA16-600B AC voltage phase shift problem
Today I saw a circuit that I was very curious about, but I didn't have an oscilloscope, so I took it out to ask my seniors for help. The circuit diagram ( BTA16 is a rough idea, of course it is more c...
ligongxiaobie Analog electronics
Problems with connecting FPGA to DDR SDRAM
Do DDR SDRAM pins have to be connected to the DQS pins of the FPGA? What is the impact of connecting them to ordinary IO pins? FPGA has 484 pins, and a bank has a few pins, so it is difficult to divid...
eeleader FPGA/CPLD
Finally got it done, the full character set of the digital tube defined by myself, everyone is welcome to use it
Finally got it done, the full character set of the digital tube defined by myself, welcome to use...
fuckosoon2008 Integrated technical exchanges
[RVB2601 Creative Application Development] + Use of GPIO
[i=s]This post was last edited by jinglixixi on 2022-5-10 19:19[/i]After solving the construction of the development environment, the first thing to learn is the use of GPIO port. In fact, if there is...
jinglixixi XuanTie RISC-V Activity Zone

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2273  2417  1984  2428  527  46  49  40  11  52 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号