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MC-2311100F9-B10-BQ1

Description
Memory Circuit, 1MX16, CMOS, PBGA61, 9 X 7 MM, FBGA-61
Categorystorage    storage   
File Size287KB,46 Pages
ManufacturerNEC Electronics
Download Datasheet Parametric View All

MC-2311100F9-B10-BQ1 Overview

Memory Circuit, 1MX16, CMOS, PBGA61, 9 X 7 MM, FBGA-61

MC-2311100F9-B10-BQ1 Parametric

Parameter NameAttribute value
MakerNEC Electronics
Parts packaging codeBGA
package instructionTFBGA,
Contacts61
Reach Compliance Codeunknown
Other featuresSRAM CONFIGURATION IS 256K X 16
JESD-30 codeR-PBGA-B61
length9 mm
memory density16777216 bit
Memory IC TypeMEMORY CIRCUIT
memory width16
Number of functions1
Number of terminals61
word count1048576 words
character code1000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature-20 °C
organize1MX16
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3 V
Minimum supply voltage (Vsup)2.6 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
width7 mm
PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
MC-2311100
MCP (MULTI-CHIP PACKAGE) MOBILE SPECIFIED RAM AND SRAM
16M-BIT CMOS MOBILE SPECIFIED RAM AND 4M-BIT CMOS SRAM
Description
The MC-2311100 is a stacked type MCP (Multi-Chip Package) of 16,777,216 bits (1,048,576 words by 16 bits) Mobile
specified RAM and 4,194,304 bits (BYTE mode : 524,288 words by 8 bits, WORD mode : 262,144 words by 16 bits)
SRAM.
The MC-2311100 is packaged in a 61-pin TAPE FBGA.
General Features
Supply voltage : V
CC
m / V
CC
s = 2.6 to 3.0 V
Wide operating temperature : T
A
=
−20
to +70
°C
Output Enable input for easy application
Byte data control : /LB (I/O0 to I/O7), /UB (I/O8 to I/O15)
Mobile specified RAM Features
Memory organization : 1,048,576 words by 16 bits
Fast access time : t
AA
= 80, 90, 100 ns (MAX.)
Supply current : At operating : 35 mA (MAX.)
At Standby Mode 1 : 100
µ
A (MAX.) Normal standby (Memory cell data hold valid)
At Standby Mode 2 : 10
µ
A (MAX.) Memory cell data hold invalid
Chip Enable inputs : /CEm
Standby Mode input : MODE
SRAM Features
Memory organization : 524,288 words
×
8 bits (BYTE mode)
262,144 words
×
16 bits (WORD mode)
Fast access time : t
AA
= 70 ns (MAX.)
Supply current : At operating : 40 mA (MAX.)
At Standby Mode : 7
µ
A (MAX.)
Low V
CC
data retention: 1.0 V (MIN.)
Two Chip Enable inputs: /CE1s, CE2s
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M15432EJ1V0DS00 (1st edition)
Date Published November 2001 NS CP (K)
Printed in Japan
The mark
5
shows major revised points.
©
2001

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