PALCE22V10H-25PC/4 datasheet, PDF

PALCE22V10H-25PC/4: DescriptionEE PLD, 25ns, PAL-Type, CMOS, PDIP24, 0.300 INCH, SKINNY, PLASTIC, DIP-24; CategoryProgrammable logic devices Programmable logic; File Size661KB，21 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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PALCE22V10H-25PC/4 Overview

EE PLD, 25ns, PAL-Type, CMOS, PDIP24, 0.300 INCH, SKINNY, PLASTIC, DIP-24

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	AMD
Parts packaging code	DIP
package instruction	DIP, DIP24,.3
Contacts	24
Reach Compliance Code	unknown
Other features	10 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK
Architecture	PAL-TYPE
maximum clock frequency	33.3 MHz
JESD-30 code	R-PDIP-T24
JESD-609 code	e0
length	30.734 mm
Dedicated input times	11
Number of I/O lines	10
Number of entries	22
Output times	10
Number of product terms	132
Number of terminals	24
Maximum operating temperature	75 °C
Minimum operating temperature
organize	11 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	EE PLD
propagation delay	25 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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