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MC10H604, MC100H604
Registered Hex TTL to ECL
Translator
Description
The MC10H/100H604 is a 6−bit, registered, dual supply TTL to
ECL translator. The device features differential ECL outputs as well as
a choice between either a differential ECL clock input or a TTL clock
input. The asynchronous master reset control is an ECL level input.
With its differential ECL outputs and TTL inputs the H604 device is
ideally suited for the transmit function of a HPPI bus type
board−to−board interface application. The on−chip registers simplify
the task of synchronizing the data between the two boards.
The device is available in either ECL standard: the 10H device is
compatible with MECL 10KH logic levels while the 100H device is
compatible with 100K logic levels.
Features
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281
PLCC−28
FN SUFFIX
CASE 776
•
•
•
•
•
•
Differential 50
W
ECL Outputs
Choice Between Differential ECL or TTL Clock Input
Dual Power Supply
Multiple Power and Ground Pins to Minimize Noise
Specified Within−Device Skew
Pb−Free Packages are Available*
MARKING DIAGRAM*
1 28
MCxxxH604G
AWLYYWW
xxx
A
WL
YY
WW
G
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2009
September, 2009
−
Rev. 6
1
Publication Order Number:
MC10H604/D
MC10H604, MC100H604
D1 D2 V
CCT
D3
25
24
23
22
D4
21
D5 V
CCE
20
19
18
17
16
15
Table 1. PIN DESCRIPTION
Q5
Q5
Q4
Q4
V
CCE
Q3
Q3
D0
TCLK
V
BB
CLK
CLK
MR
V
CCE
PIN
D0−D5
CLK, CLK
TCLK
MR
Q0−Q5
Q0−Q5
V
CCE
V
CCT
V
EE
FUNCTION
TTL Data Inputs
Differential ECL Clock Input
TTL Clock Input
ECL Master Reset Input
True ECL Outputs
Inverted ECL Outputs
ECL V
CC
(0 V) = TTL GND
TTL V
CC
(+5.0 V)
ECL V
EE
(−5.2 V)
26
27
28
2
3
4
5
6
7
8
9
10
11
14
13
12
Q0 Q0
V
EE
Q1 Q1 Q2
Q2
Figure 1. PLCC−28 Pinout
(Top View)
1 OF 6 BITS
Q
n
Q
n
Table 2. TRUTH TABLE
D
n
L
H
X
MR
L
L
H
TCLK/CLK
Z
Z
X
Q
n
+1
L
H
L
D
n
D
Q
Z = LOW to HIGH Transition
CLK
R
CLK
CLK
TCLK
MR
*
*
V
BB
1. When using MECL inputs, TCLK must be tied to ground (0 V).
2. When using only one MECL input, the unused MECL input must be tied
to V
BB
, and TCLK must be tied to ground (0 V).
3. When using TCLK, both MECL inputs must be tied to V
EE
(−5.2 V).
Figure 2. Logic Symbol
Table 3. DC CHARACTERISTICS
(V
EE
= V
EE
(Min) to V
EE
(Max); V
CCE
= GND; V
CCT
= 5.0 V +10%)
0°C
Symbol
I
EE
I
CCH
I
CCL
Parameter
ECL Power Supply Current
TTL Power Supply Current
10H
100H
Min
Max
130
130
35
45
Min
25°C
Max
130
140
35
45
Min
85°C
Max
130
150
35
45
Unit
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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2
MC10H604, MC100H604
Table 4. 10H ECL DC CHARACTERISTICS
(V
CCT
= +5.0 V
±
10%; V
EE
=
−
5.20 V
±5%;
V
CCE
= GND)
0°C
Symbol
I
INH
I
INL
V
IH
V
IL
V
BB
V
OH
V
OL
Parameter
Input HIGH Current
Input LOW Current
Input HIGH Voltage
Input LOW Voltage
Output Bias Voltage
Output HIGH Voltage
Output LOW Voltage
50
W
to
−
2.0 V
Condition
Min
0.5
−1170
−1950
−1400
−1020
−1950
Max
255
−840
−1480
−1290
−840
−1630
Min
0.5
−1130
−1950
−1370
−980
−1950
25°C
Max
175
−810
−1480
−1270
−810
−1630
Min
0.5
−1060
−1950
−1330
−910
−1950
85°C
Max
175
−720
−1480
−1210
−720
−1595
Unit
mA
mA
mV
mV
mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Table 5. 100H ECL DC CHARACTERISTICS
(V
CCT
= 5.0 V
±
10%; V
EE
=
−
4.2 V to
−
5.5 V; V
CCE
= GND)
0°C
Symbol
I
INH
I
INL
V
IH
V
IL
V
BB
V
OH
V
OL
Parameter
Input HIGH Current
Input LOW Current
Input HIGH Voltage
Input LOW Voltage
Output Bias Voltage
Output HIGH Voltage
Output LOW Voltage
50
W
to
−
2.0 V
Condition
Min
0.5
−1165
−1810
−1400
−1025
−1810
Max
255
−880
−1475
−1280
−880
−1620
Min
0.5
−1165
−1810
−1400
−1025
−1810
25°C
Max
175
−880
−1475
−1280
−880
−1620
Min
0.5
−1165
−1810
−1400
−1025
−1810
85°C
Max
175
−880
−1475
−1280
−880
−1620
Unit
mA
mA
mV
mV
mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
V
CCE
= GND)
Table 6. TTL DC CHARACTERISTICS
(V
CCT
= 5.0 V
±
10%; V
EE
=
−
5.2 V
±
5% (10H); V
EE
=
−
4.2 V to
−
5.5 V (100H);
0°C
Symbol
V
IH
V
IL
I
IH
I
IL
V
IK
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Input Clamp Voltage
V
IN
= 2.7 V
V
IN
= 7.0 V
V
IN
= 0.5 V
I
IN
=
−18
mA
Condition
Min
2.0
Max
0.8
20
100
−0.6
−1.2
Min
2.0
25°C
Max
0.8
20
100
−0.6
−1.2
Min
2.0
85°C
Max
0.8
20
100
−0.6
−1.2
Unit
V
V
mA
mA
V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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MC10H604, MC100H604
Table 7. AC CHARACTERISTICS
(V
CCT
= 5.0 V
±
10%; V
EE
=
−
5.2 V
±
5% (10H); V
EE
=
−
4.2 V to
−
5.5 V (100H); V
CCE
= GND)
0°C
Symbol
t
PLH
t
PHL
t
s
t
H
t
PW
V
PP
t
r
t
f
Parameter
Propagation Delay
to Output
Setup Time
Hold Time
Minimum Pulse Width
Minimum Input Swing
Rise/Fall Times
20%
−
80%
0.3
1.0
2.0
0.3
CLK, MR
CLK to Q
TCLK to Q
MR to Q
Condition
50
W
to
−
2.0 V
Min
1.5
2.0
1.5
1.5
1.5
0.5
0.5
1.0
Typ
Max
3.5
4.0
4.0
Min
1.5
2.0
1.5
1.5
1.5
0.5
0.5
1.0
150
1.0
2.0
0.3
1.0
2.0
25°C
Typ
Max
3.5
4.0
4.0
Min
1.5
2.0
1.5
1.5
1.5
0.5
0.5
1.0
85°C
Typ
Max
3.5
4.0
4.0
Unit
ns
50
W
to
−
2.0 V
50
W
to
−
2.0 V
50
W
to
−
2.0 V
ns
ns
ns
mV
ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
ORDERING INFORMATION
Device
MC10H604FN
MC10H604FNG
MC10H604FNR2
MC10H604FNR2G
MC100H604FN
MC100H604FNG
MC100H604FNR2
MC100H604FNR2G
Package
PLCC−28
PLCC−28
(Pb−Free)
PLCC−28
PLCC−28
(Pb−Free)
PLCC−28
PLCC−28
(Pb−Free)
PLCC−28
PLCC−28
(Pb−Free)
Shipping
†
37 Units / Rail
37 Units / Rail
500 / Tape & Reel
500 / Tape & Reel
37 Units / Rail
37 Units / Rail
500 / Tape & Reel
500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
ECL Clock Distribution Techniques
−
Designing with PECL (ECL at +5.0 V)
−
ECLinPSt I/O SPiCE Modeling Kit
−
Metastability and the ECLinPS Family
−
Interfacing Between LVDS and ECL
−
The ECL Translator Guide
−
Odd Number Counters Design
−
Marking and Date Codes
−
Termination of ECL Logic Devices
−
Interfacing with ECLinPS
−
AC Characteristics of ECL Devices
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