LCD Segment Driver series
80-segment Drivers
(20SEG×4COM)
BU9796FS
No.09044EAT02
●Description
This is LCD segment driver for 80 segment type display. There is a lineup which is suitable for multi function display and is
integrated display RAM and power supply circuit for LCD driving with 4 common output type: BU9796FS.
●Features
1) 2wire serial interface
2) Integrated RAM for display data (DDRAM)
：
20 × 4bit (Max 80 Segment)
3) LCD driving port： 4 Common output, 20 Segment output
4) Display Duty: 1/4 duty
5) Integrated Oscillation circuit
6) Integrated Buffer AMP for LCD driving power supply circuit
7) Support 1/2bias, 1/3bias select
8) No external components
9) Low voltage / low power consumption design: 2.5~5.5V
●Applications
Telephone, FAX, Portable equipments (POS, ECR, PDA etc.),
DSC, DVC, Car audio, Home electrical appliance, Meter equipment etc.
●
Absolute Maximum Ratings
（Ta=25degree,
VSS=0V）
Parameter
Power Supply Voltage1
Power Supply Voltage2
Allowable loss
Input voltage range
Operational temperature
range
Storage temperature
range
Symbol
VDD
VLCD
Pd
VIN
Topr
Tstg
Limits
-0.5
½
+7.0
-0.5
½
+7.0
0.64
-0.5
½
VDD+0.5
-40
½
+85
-55
½
+125
Unit
V
V
W
V
degree
degree
Remarks
Power supply
LCD drive voltage
When use more than Ta=25C, subtract
6.4mW per degree.
*This product is not designed against radioactive ray.
●
Recommend operating conditions (Ta=25degree, VSS=0V)
Parameter
Power Supply Voltage1
Power Supply Voltage2
Symbol
VDD
VLCD
MIN
2.5
0
TYP
-
-
MAX
5.5
VDD-2.4
Unit
V
V
Remarks
Power supply
LCD drive voltage
* Please use in the range of VDD-VLCD≧ 2.4V
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© 2009 ROHM Co., Ltd. All rights reserved.
1/11
2009.05 - Rev.A
BU9796FS
Technical Note
●Electrical
Characteristics
DC Characteristics
(VDD=2.5½5.5V, VLCD=0V, VSS=0V, Ta=-40½85degree, unless otherwise specified)
Parameter
“H” level input voltage
“L” level input voltage
“H” level input current
“L” level input current
LCD Driver
on resistance
Standby current
SEG
COM
Symbol
VIH
VIL
IIH
IIL
RON
RON
VLCD
IDD1
Limit
MIN
0.7VDD
VSS
-
-1
-
-
0
-
TYP
-
-
-
-
3
3
-
-
MAX
VDD
0.3VDD
1
-
-
-
VDD-2.4
5
Unit
V
V
uA
uA
kΩ
kΩ
V
uA
Iload=±10uA
VDD-VLCD≧2.4V
Display off, Oscillation off
VDD=3.3V, VLCD=0V, Ta=25degree
Power save mode SR = Power save mode1,
Power save mode FR = Power save mode1
1/3 bias, Frame inverse
Power save mode FR = Normal mode
Condition
VLCD supply voltage
Power consumption
IDD2
-
12.5
30
uA
Frame frequency
fCLK
56
80
104
Hz
MPU interface Characteristics (VDD=2.5½5.5V, VLCD=0V, VSS=0V, Ta=-40½85degree, unless otherwise specified)
Parameter
Input rise time
Input fall time
SCL cycle time
“H” SCL pulse width
“L” SCL pulse width
SDA setup time
SDA hold time
Buss free time
START condition hold time
Symbol
tr
tf
tSCYC
tSHW
tSLW
tSDS
tSDH
tBUF
tHD;STA
tSU;STA
tSU;STO
Limit
MIN.
-
-
2.5
0.6
1.3
100
100
1.3
0.6
0.6
0.6
TYP.
-
-
-
-
-
-
-
-
-
-
-
MAX.
0.3
0.3
-
-
-
-
-
-
-
-
-
Unit
us
us
us
us
us
ns
ns
us
us
us
us
Condition
START condition setup time
STOP condition setup time
SDA
t
BUF
t
LW
t
r
t
f
t
cyc
SCL
t
HD;STA
t
r
t
SDH
t
HW
t
SDS
SDA
t
SU;STA
t
SU;STO
Fig. 1 interface timing
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© 2009 ROHM Co., Ltd. All rights reserved.
2/11
2009.05 - Rev.A
BU9796FS
●Block
Diagram
COM0……COM3
VDD
SEG0……SEG19
Technical Note
●
Pin Arrangement
TEST 2
TEST 1
SEG 19
SEG 16
SEG 1
＋
－
LCD
BIAS
SELECTOR
common
counter
blink timing
generator
DDRAM
＋
－
VLCD
OSCIN
OSCILLATOR
Pow er On Reset
Command
register
Command
Data Decoder
SEG 2
SEG 3
SEG 4
SEG 5
SCL
SEG 6
SEG 7
SEG 8
SEG 9
SEG 10
SEG 11
VLCD
SEG0
VDD
SDA
VSS
common
driver
Segment
driver
SEG 12
SEG 13
SEG 14
SEG 15
serial inter face
IF FILTER
VSS
Fig. 2 block diagram
SDA
SCL
Fig. 3
Pin arrangement
●Terminal
description
Terminal
TEST1
Terminal
No.
26
I/O
I
Test input (ROHM use only)
Must be connect to VSS
Test input (ROHM use only)
TEST2=”L”: POR circuit enable
TEST2=”H”: POR circuit disenable,
refer to “Cautions in Power ON/OFF”
External clock input
Ext clock and Int clock can be changed by command.
Must be connect to VSS when use internal oscillation circuit.
serial data in-out terminal
serial data transfer clock
GND
Power supply
Power supply for LCD driving
O
O
SEGMENT output for LCD driving
COMMON output for LCD driving
Function
TEST2
27
I
OSCIN
SDA
SCL
VSS
VDD
VLCD
SEG0-19
COM0-3
28
30
29
25
24
23
31,32
1-18
19-22
I
I/O
I
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© 2009 ROHM Co., Ltd. All rights reserved.
3/11
2009.05 - Rev.A
SEG 17
SEG 18
COM 3
COM 2
COM 1
COM 0
OSCIN
LCD voltage generator
BU9796FS
●
Command Description
D7 (MSB) is bit for command or data judgment.
Refer to Command and data transfer method.
C： 0： Next byte is RAM write data.
1： Next byte is command.
Technical Note
○
Display control (DISCTL)
MSB
D7
C
D6
0
D5
1
D4
P4
D3
P3
D2
P2
D1
P1
LSB
D0
P0
Set Power save mode FR
Setup
Normal mode
Power save mode1
Power save mode2
Power save mode3
Set LCD drive waveform
Setup
Line inversion
Frame inversion
Set Power save mode SR
Setup
P4
0
0
1
1
P3
0
1
0
1
Reset initialize condition
○
P2
0
1
Reset initialize condition
○
P1
P0
Reset initialize condition
Power save mode1
0
0
Power save mode2
0
1
Normal mode
1
0
○
High power mode
1
1
* Please keep condition VDD-VLCD≧3.0V in High power mode.
○
Mode Set (MODE SET)
MSB
D7
C
D6
1
D5
0
D4
*
D3
P3
D2
P2
D1
*
LSB
D0
*
(*: Don’t Care)
Set display ON and OFF
Setup
Display OFF
Display ON
Set bias level
Setup
1/3 Bias
1/2 Bias
P3
0
1
Reset initialize condition
○
P3
0
1
Reset initialize condition
○
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© 2009 ROHM Co., Ltd. All rights reserved.
4/11
2009.05 - Rev.A
BU9796FS
Technical Note
○
Address set (ADSET)
MSB
D7
C
D6
0
D5
0
D4
P4
D3
P3
D2
P2
D1
P1
LSB
D0
P0
The range of address can be set as 00000 to 10011(2).
○
Set IC Operation (ICSET)
MSB
D7
C
D6
1
D5
1
D4
0
D3
1
D2
*
D1
P1
LSB
D0
P0
(*: Don’t Care)
Set software reset execution
Setup
No operation
Software Reset execute
Set oscillator mode
setup
Internal oscillation
External clock input
P1
0
1
P0
0
1
Reset initialize condition
○
○
Blink control (BLKCTL)
MSB
D7
C
D6
1
D5
1
D4
1
D3
0
D2
*
D1
P1
LSB
D0
P0
(*: Don’t Care)
Set blink mode
Blink mode (Hz)
OFF
0.5
1
2
P1
0
0
1
1
P0
0
1
0
1
Reset initialize condition
○
○
All Pixel control (APCTL)
MSB
D7
C
D6
1
D5
1
D4
1
D3
1
D2
1
D1
P1
LSB
D0
P0
All display set ON, OFF
APON
Normal
All pixel ON
APOFF
Normal
All pixel OFF
P1
0
1
P0
0
1
Reset initialize condition
○
Reset initialize condition
○
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© 2009 ROHM Co., Ltd. All rights reserved.
5/11
2009.05 - Rev.A
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