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IDT70825L35PFBG

Description
Standard SRAM, 8KX16, 35ns, CMOS, PQFP80, TQFP-80
Categorystorage    storage   
File Size213KB,21 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
Download Datasheet Parametric View All

IDT70825L35PFBG Overview

Standard SRAM, 8KX16, 35ns, CMOS, PQFP80, TQFP-80

IDT70825L35PFBG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instructionTQFP-80
Contacts80
Reach Compliance Codecompliant
ECCN code3A001.A.2.C
Maximum access time35 ns
JESD-30 codeS-PQFP-G80
JESD-609 codee3
length14 mm
memory density131072 bit
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals80
word count8192 words
character code8000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize8KX16
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width14 mm
IDT70825S/L
HIGH SPEED 128K (8K X 16 BIT)
SEQUENTIAL ACCESS
RANDOM ACCESS MEMORY (SARAM™)
Features
High-speed access
– Military: 35/45ns (max.)
– Commercial: 20/25/35/45ns (max.)
Low-power operation
– IDT70825S
Active: 775mW (typ.)
Standby: 5mW (typ.)
– IDT70825L
Active: 775mW (typ.)
Standby: 1mW (typ.)
8K x 16 Sequential Access Random Access Memory
(SARAM
)
– Sequential Access from one port and standard Random
Access from the other port
– Separate upper-byte and lower-byte control of the
Random Access Port
High speed operation
– 20ns t
AA
for random access port
– 20ns t
CD
for sequential port
– 25ns clock cycle time
Architecture based on Dual-Port RAM cells
Compatible with Intel BMIC and 82430 PCI Set
Width and Depth Expandable
Sequential side
– Address based flags for buffer control
– Pointer logic supports up to two internal buffers
Battery backup operation - 2V data retention
TTL-compatible, single 5V (+10%) power supply
Available in 80-pin TQFP and 84-pin PGA
Military product compliant to MIL-PRF-38535 QML
Industrial temperature range (-40°C to +85°C) is available
for selected speeds
Description
The IDT70825 is a high-speed 8K x 16-Bit Sequential Access
Random Access Memory (SARAM). The SARAM offers a single-chip
solution to buffer data sequentially on one port, and be accessed
randomly (asynchronously) through the other port. The device has a
Functional Block Diagram
A
0-12
CE
OE
R/W
LB
LSB
MSB
UB
CMD
I/O
0-15
13
Random
Access
Port
Controls
Sequential
Access
Port
Controls
8K X 16
Memory
Array
16
13
RST
SCLK
CNTEN
SOE
SSTRT
1
SSTRT
2
SCE
SR/W
SLD
SI/O
0-15
,
Data
L
Addr
L
Data
R
Addr
R
16
Reg.
13
16
13
13
13
13
RST
Pointer/
Counter
Start Address for Buffer #1
End Address for Buffer #1
Start Address for Buffer #2
End Address for Buffer #2
Flow Control Buffer
Flag Status
13
EOB
1
COMPARATOR
EOB
2
3016 drw 01
MAY 2000
1
©2000 Integrated Device Technology, Inc.
DSC-3016/9
6.07
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