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Regarding the change of names mentioned in the document, such as Hitachi
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The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
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Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
Cautions
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Remember to give due consideration to safety when making your circuit designs, with appropriate
measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or
(iii) prevention against any malfunction or mishap.
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contained therein.
HD74AC283/HD74ACT283
Logic Symbol
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
C
0
C
4
S
0
S
1
S
2
S
3
Pin Names
A
0
– A
3
B
0
– B
3
C
0
S
0
– S
3
C
4
A Operand Inputs
B Operand Inputs
Carry Input
Sum Outputs
Carry Output
Functional Description
The HD74AC283/HD74ACT283 adds two 4-bit binary words (A plus B) plus the incoming Carry (C
0
).
The binary sum appears on the Sum (S
0
– S
3
) and outgoing carry (C
4
) outputs. The binary weight of the
various inputs and outputs is indicated by the subscript numbers, representing powers of two.
2
0
(A
0
+ B
0
+ C
0
) + 2
1
(A
1
+ B
1
) + 2
2
(A
2
+ B
2
) + 2
3
(A
3
+ B
3
) = S
0
+ 2S
1
+ 4S
2
+ 8S
3
+ 16C
4
Where (+) = plus
Interchanging inputs of equal weight does not affect the operation. Thus C
0
, A
0
, B
0
can be arbitrarily
assigned to pins 5, 6 and 7 for DIPS. Due to the symmetry of the binary add function, the
HD74AC283/HD74ACT283 can be used either with all inputs and outputs active High (positive logic) or
with all inputs and outputs active Low (negative logic). See Figure a. Note that if C
0
is not used it must be
tied Low for active High logic or tied High for active Low logic.
Due to pin limitations, the intermediate carries of the HD74AC283/HD74ACT283 are not brought out for
use as inputs or outputs. However, other means can be used to effectively insert a carry into, or bring a
carry out from, an intermediate stage. Figure b shows how to make a 3-bit adder. Tying the operand inputs
of the fourth adder (A
3
, B
3
) Low makes S
3
dependent only on, and equal to, the carry from the third adder.
Using somewhat the same principle Figure c shows a way of dividing the HD74AC283/HD74ACT283 into
a 2-bit and a 1-bit adder. The third stage adder (A
2
, B
2
, S
2
) is used merely as a means of getting a carry
(C
10
) signal into the fourth stage (via A
2
and B
2
) and bringing out the carry from the second stage on S
2
.
Note that as long as A
2
and B
2
are the same, whether High or Low, they do not influence S
2
. Similarly,
when A
2
and B
2
are the same the carry into the third stage does not influence the carry out of the third
2