S E M I C O N D U C T O R
HI5767
10-Bit, 20/40/60 MSPS A/D Converter
with Internal Voltage Reference
Description
The HI5767 is a monolithic, 10-bit, analog-to-digital converter
fabricated in a CMOS process. It is designed for high speed
applications where wide bandwidth and low power consump-
tion are essential. Its high sample clock rate is made possible
by a fully differential pipelined architecture with both an internal
sample and hold and internal band-gap voltage reference.
The 250MHz Full Power Input Bandwidth and superior high
frequency performance of the HI5767 converter make it an
excellent choice for implementing Digital IF architectures in
communications applications.
The HI5767 has excellent dynamic performance while
consuming only 310mW power at 40 MSPS. Data output
latches are provided which present valid data to the output
bus with a latency of 7 clock cycles.
The HI5767 is offered in 20 MSPS, 40 MSPS and 60 MSPS
sampling rates.
August 1997
Features
• Sampling Rate . . . . . . . . . . . . . . . . . . . . 20/40/60 MSPS
• 8.8 Bits at f
IN
= 10MHz, f
S
= 40 MSPS
• Low Power at 40 MSPS . . . . . . . . . . . . . . . . . . . .310mW
• Wide Full Power Input Bandwidth . . . . . . . . . . 250MHz
• On-Chip Sample and Hold
• Internal 2.5V Band-Gap Voltage Reference
• Fully Differential or Single-Ended Analog Input
• Single Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . +5V
• TTL/CMOS Compatible Digital Inputs
• CMOS Compatible Digital Outputs. . . . . . . . . 3.0V/5.0V
• Offset Binary or Two’s Complement Output Format
Applications
• Digital Communication Systems
• QAM Demodulators
• Professional Video Digitizing
• Medical Imaging
• High Speed Data Acquisition
Ordering Information
PART
NUMBER
HI5767/2CB
HI5767/4CB
HI5767/6CB
HI5767EVAL1
TEMP.
RANGE
(
o
C)
0 to 70
0 to 70
0 to 70
25
PKG.
NO.
M28.3
M28.3
M28.3
SAMPLING
RATE
(MSPS)
20
40
60
60
PACKAGE
28 Ld SOIC
28 Ld SOIC
28 Ld SOIC
Evaluation Board
Pinout
HI5767 (SOIC)
TOP VIEW
DV
CC1
1
DGND 2
DV
CC1
3
DGND 4
AV
CC
5
AGND 6
V
REFIN
7
V
REFOUT
8
V
IN
+ 9
V
IN
- 10
V
DC
11
AGND 12
AV
CC
13
OE 14
28 D0
27 D1
26 D2
25 D3
24 D4
23 DV
CC2
22 CLK
21 DGND
20 D5
19 D6
18 D7
17 D8
16 D9
15 DFS
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
Harris Corporation 1997
File Number
4319.1
4-354
HI5767
Functional Block Diagram
V
DC
V
IN
-
V
IN
+
S/H
V
REFOUT
REFERENCE
V
REFIN
BIAS
CLOCK
CLK
STAGE 1
DFS
2-BIT
FLASH
2-BIT
DAC
OE
+
∑
-
DV
CC2
X2
D9 (MSB)
D8
D7
D6
STAGE 8
DIGITAL DELAY
AND
DIGITAL ERROR
CORRECTION
D5
D4
D3
2-BIT
FLASH
2-BIT
DAC
D2
D1
+
∑
D0 (LSB)
-
X2
DGND2
STAGE 9
2-BIT
FLASH
AV
CC
AGND
DV
CC1
DGND1
4-355
HI5767
Typical Application Schematic
HI5767
V
REFIN
(7)
V
REFOUT
(8)
0.1µF
(LSB) (28) D0
(27) D1
AGND (12)
AGND (6)
DGND1 (2)
DGND1 (4)
DGND2 (21)
(26) D2
(25) D3
(24) D4
(20) D5
(19) D6
(18) D7
(17) D8
(MSB) (16) D9
V
IN
+
V
IN
+ (9)
V
DC
(11)
V
IN
-
V
IN
- (10)
(1) DV
CC1
(3) DV
CC1
(23) DV
CC2
0.1µF
CLOCK
CLK (22)
DFS (15)
OE (14)
(13) AV
CC
(5) AV
CC
0.1µF
+
10µF
+5V
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
10µF AND 0.1µF CAPS
ARE PLACED AS CLOSE
TO PART AS POSSIBLE
+
10µF
+5V
DGND
AGND
BNC
Pin Descriptions
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
NAME
DV
CC1
DGND1
DV
CC1
DGND1
AV
CC
AGND
V
REFIN
V
REFOUT
V
IN
+
V
IN
-
V
DC
AGND
AV
CC
OE
DFS
DESCRIPTION
Digital Supply (+5.0V)
Digital Ground
Digital Supply (+5.0V)
Digital Ground
Analog Supply (+5.0V)
Analog Ground
+2.5V Reference Voltage Input
+2.5V Reference Voltage Output
Positive Analog Input
24
Negative Analog Input
25
DC Bias Voltage Output
26
Analog Ground
27
Analog Supply (+5.0V)
28
Digital Output Enable Control Input
Data Format Select Input
D0
Data Bit 0 Output (LSB)
D1
Data Bit 1 Output
D2
Data Bit 2 Output
D3
Data Bit 3 Output
D4
Data Bit 4 Output
PIN NO.
16
17
18
19
20
21
22
23
NAME
D9
D8
D7
D6
D5
DGND2
CLK
DV
CC2
DESCRIPTION
Data Bit 9 Output (MSB)
Data Bit 8 Output
Data Bit 7 Output
Data Bit 6 Output
Data Bit 5 Output
Digital Ground
Sample Clock Input
Digital Output Supply
(+3.0V or +5.0V)
4-356
HI5767
Absolute Maximum Ratings
T
A
= 25
o
C
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(
o
C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range
. . . . . . . . . -
65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
Supply Voltage, AV
CC
or DV
CC
to AGND or DGND. . . . . . . . . . . 6V
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3V
Digital I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DGND to DV
CC
Analog I/O Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . AGND to AV
CC
Operating Conditions
Temperature Range
HI5767/XCB (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . . . .0
o
C to 70
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AV
CC
= DV
CC1
= 5.0V, DV
CC2
= 3.0V; V
REFIN
= V
REFOUT
; f
S
= 40 MSPS at 50% Duty Cycle;
C
L
= 10pF; T
A
= 25
o
C; Differential Analog Input; Typical Values are Test Results at 25
o
C,
Unless Otherwise Specified
TEST CONDITIONS
MIN
TYP
MAX
UNITS
PARAMETER
ACCURACY
Resolution
Integral Linearity Error, INL
Differential Linearity Error, DNL
(Guaranteed No Missing Codes)
Offset Error, V
OS
Full Scale Error, FSE
DYNAMIC CHARACTERISTICS
Minimum Conversion Rate
Maximum Conversion Rate
Effective Number of Bits, ENOB
HI5767/2
HI5767/4
Signal to Noise and Distortion Ratio, SINAD
RMS Signal
= -------------------------------------------------------------
-
RMS Noise + Distortion
HI5767/2
HI5767/4
Signal to Noise Ratio, SNR
RMS Signal
= ------------------------------
-
RMS Noise
HI5767/2
HI5767/4
Total Harmonic Distortion, THD
HI5767/2
HI5767/4
2nd Harmonic Distortion
HI5767/2
HI5767/4
f
IN
= DC
f
IN
= DC
f
IN
= DC
f
IN
= DC
10
-
-
-40
-
-
±0.75
±0.35
-
4
-
±1.75
±1.0
40
-
Bits
LSB
LSB
LSB
LSB
No Missing Codes
No Missing Codes
-
40
0.5
-
1
-
MSPS
MSPS
f
S
= 20 MSPS, f
IN
= 10MHz
f
S
= 40 MSPS, f
IN
= 10MHz
8.7
8.55
9
8.8
-
-
Bit
Bit
f
S
= 20 MSPS, f
IN
= 10MHz
f
S
= 40 MSPS, f
IN
= 10MHz
-
-
55.9
54.7
-
-
dB
dB
f
S
= 20 MSPS, f
IN
= 10MHz
f
S
= 40 MSPS, f
IN
= 10MHz
-
-
55.9
55
-
-
dB
dB
f
S
= 20 MSPS, f
IN
= 10MHz
f
S
= 40 MSPS, f
IN
= 10MHz
-
-
-71
-65
-
-
dBc
dBc
f
S
= 20 MSPS, f
IN
= 10MHz
f
S
= 40 MSPS, f
IN
= 10MHz
-
-
-76
-73
-
-
dBc
dBc
4-357
HI5767
Electrical Specifications
AV
CC
= DV
CC1
= 5.0V, DV
CC2
= 3.0V; V
REFIN
= V
REFOUT
; f
S
= 40 MSPS at 50% Duty Cycle;
C
L
= 10pF; T
A
= 25
o
C; Differential Analog Input; Typical Values are Test Results at 25
o
C,
Unless Otherwise Specified
(Continued)
TEST CONDITIONS
MIN
TYP
MAX
UNITS
PARAMETER
3rd Harmonic Distortion
HI5767/2
HI5767/4
Spurious Free Dynamic Range, SFDR
HI5767/2
HI5767/4
Intermodulation Distortion, IMD
Differential Gain Error
Differential Phase Error
Transient Response
Over-Voltage Recovery
ANALOG INPUT
Maximum Peak-to-Peak Differential Analog Input
Range (V
IN
+ - V
IN
-)
Maximum Peak-to-Peak Single-Ended
Analog Input Range
Analog Input Resistance, R
IN
Analog Input Capacitance, C
IN
Analog Input Bias Current, I
B
+ or I
B
-
Differential Analog Input Bias Current
I
BDIFF
= (I
B
+ - I
B
-)
Full Power Input Bandwidth, FPBW
Analog Input Common Mode Voltage Range
(V
IN
+ + V
IN
-) / 2
INTERNAL REFERENCE VOLTAGE
Reference Voltage Output, V
REFOUT
(Loaded)
Reference Output Current, I
REFOUT
Reference Temperature Coefficient
REFERENCE VOLTAGE INPUT
Reference Voltage Input, V
REFIN
Total Reference Resistance, R
REFIN
Reference Input Current, I
REFIN
DC BIAS VOLTAGE
DC Bias Voltage Output, V
DC
Maximum Output Current
DIGITAL INPUTS
Input Logic High Voltage, V
IH
Input Logic Low Voltage, V
IL
(Note 3)
(Note 3)
(Note 3)
f
S
= 20 MSPS, f
IN
= 10MHz
f
S
= 40 MSPS, f
IN
= 10MHz
-
-
-80
-69
-
-
dBc
dBc
f
S
= 20 MSPS, f
IN
= 10MHz
f
S
= 40 MSPS, f
IN
= 10MHz
f
1
= 1MHz, f
2
= 1.02MHz
f
S
= 17.72MHz, 6 Step, Mod Ramp
f
S
= 17.72MHz, 6 Step, Mod Ramp
(Note 2)
0.2V Overdrive (Note 2)
-
-
-
-
-
-
-
76
69
64
0.5
0.2
1
1
-
-
-
-
-
-
-
dBc
dBc
dBc
%
Degree
Cycle
Cycle
-
-
-
-
-10
±0.5
1.0
1
10
-
±0.5
−
-
-
-
+10
V
V
MΩ
pF
µA
µA
-
Differential Mode (Note 2)
0.25
250
-
-
4.75
MHz
V
-
-
-
2.47
1
120
-
2
-
V
mA
ppm/
o
C
-
-
-
2.5
2.5
1
-
-
-
V
kΩ
mA
-
-
3.0
-
-
0.2
V
mA
CLK, DFS, OE
CLK, DFS, OE
2.0
-
-
-
-
0.8
V
V
4-358
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