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CAT24WC32L-1.8REV-D

Description
4KX8 I2C/2-WIRE SERIAL EEPROM, PDIP8, 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-001, DIP-8
Categorystorage    storage   
File Size456KB,12 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Environmental Compliance
Download Datasheet Parametric View All

CAT24WC32L-1.8REV-D Overview

4KX8 I2C/2-WIRE SERIAL EEPROM, PDIP8, 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-001, DIP-8

CAT24WC32L-1.8REV-D Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerCatalyst
Parts packaging codeDIP
package instructionDIP,
Contacts8
Reach Compliance Codeunknown
Maximum clock frequency (fCLK)0.1 MHz
JESD-30 codeR-PDIP-T8
JESD-609 codee3
length9.59 mm
memory density32768 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count4096 words
character code4000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize4KX8
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height4.57 mm
Serial bus typeI2C
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.8 V
Nominal supply voltage (Vsup)3 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width7.62 mm
Maximum write cycle time (tWC)10 ms
CAT24WC32/64
32K/64K-Bit I
2
C Serial CMOS EEPROM
FEATURES
I
400 KHz I
2
C bus compatible*
I
1.8 to 5.5 volt read and write operation
I
Cascadable for up to eight devices
I
32/64-Byte page write buffer
I
Self-timed write cycle with auto-clear
I
8-pin DIP or 8-pin SOIC
I
Schmitt trigger inputs for noise protection
I
Commercial, industrial, automotive and
extended automotive temperature ranges
I
Write protection
– Entire array protected when WP at V
IH
I
1,000,000 Program/erase cycles
I
100 year data retention
DESCRIPTION
The CAT24WC32/64 is a 32K/64K-bit Serial CMOS
E
2
PROM internally organized as 4096/8192 words of 8
bits each. Catalyst’s advanced CMOS technology sub-
stantially reduces device power requirements. The
CAT24WC32/64 features a 32-byte page write buffer.
The device operates via the I
2
C bus serial interface and
is available in 8-pin DIP or 8-pin SOIC packages.
PIN CONFIGURATION
DIP Package (P, L, GL)
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
BLOCK DIAGRAM
EXTERNAL LOAD
DOUT
ACK
VCC
VSS
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
256
SENSE AMPS
SHIFT REGISTERS
SOIC Package (J, W, K, X, GW, GX)
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
SDA
START/STOP
LOGIC
E
2
PROM
XDEC 128/256 128/256 X 256
WP
CONTROL
LOGIC
PIN FUNCTIONS
Pin Name
A0, A1, A2
SDA
SCL
WP
V
CC
V
SS
Function
Device Address Inputs
Serial Data/Address
Serial Clock
Write Protect
+1.8V to +5.5V Power Supply
Ground
SCL
A0
A1
A2
STATE COUNTERS
SLAVE
ADDRESS
COMPARATORS
24WC32/64 F02
DATA IN STORAGE
HIGH VOLTAGE/
TIMING CONTROL
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I
2
C Bus Protocol.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
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