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74AUP1G09

Description
AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5
Categorysemiconductor    logic   
File Size68KB,15 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

74AUP1G09 Overview

AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5

74AUP1G09 Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals5
Maximum operating temperature125 Cel
Minimum operating temperature-40 Cel
Maximum supply/operating voltage3.6 V
Minimum supply/operating voltage0.8000 V
Rated supply voltage1.1 V
Processing package description1.25 MM, PLASTIC, MO-203, SOT353-1, SC-88A, TSSOP-5
Lead-freeYes
EU RoHS regulationsYes
China RoHS regulationsYes
stateACTIVE
CraftsmanshipCMOS
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
surface mountYes
Terminal formGULL WING
Terminal spacing0.6500 mm
terminal coatingTIN
Terminal locationDUAL
Packaging MaterialsPLASTIC/EPOXY
Temperature levelAUTOMOTIVE
seriesAUP/ULP/V
Output characteristicsO-DRN
Logic IC typeAND
Number of inputs2
propagation delay TPD24 ns
74AUP1G09
Low-power 2-input AND gate with open-drain
Rev. 01 — 15 January 2009
Product data sheet
1. General description
The 74AUP1G09 provides the single 2-input AND gate with an open-drain output. The
output of the device is an open-drain and can be connected to other open-drain outputs to
implement active-LOW wired-OR or active-HIGH wired-AND functions.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features
I
Wide supply voltage range from 0.8 V to 3.6 V
I
High noise immunity
I
Complies with JEDEC standards:
N
JESD8-12 (0.8 V to 1.3 V)
N
JESD8-11 (0.9 V to 1.65 V)
N
JESD8-7 (1.2 V to 1.95 V)
N
JESD8-5 (1.8 V to 2.7 V)
N
JESD8-B (2.7 V to 3.6 V)
I
ESD protection:
N
HBM JESD22-A114E exceeds 5000 V
N
MM JESD22-A115-A exceeds 200 V
N
CDM JESD22-C101C exceeds 1000 V
I
Low static power consumption; I
CC
= 0.9
µA
(maximum)
I
Latch-up performance exceeds 100 mA per JESD 78 Class II
I
Inputs accept voltages up to 3.6 V
I
Low noise overshoot and undershoot < 10 % of V
CC
I
I
OFF
circuitry provides partial Power-down mode operation
I
Multiple package options
I
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C

74AUP1G09 Related Products

74AUP1G09 74AUP1G09GF 74AUP1G09GM 74AUP1G09GW
Description AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5 AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5 AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5 AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5
Number of functions 1 1 1 1
Number of terminals 5 6 6 5
Maximum operating temperature 125 Cel 125 °C 125 °C 125 °C
Minimum operating temperature -40 Cel -40 °C -40 °C -40 °C
surface mount Yes YES YES YES
Terminal form GULL WING NO LEAD NO LEAD GULL WING
Terminal location DUAL DUAL DUAL DUAL
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
series AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V
Output characteristics O-DRN OPEN-DRAIN OPEN-DRAIN OPEN-DRAIN
Is it lead-free? - Lead free Lead free Lead free
Is it Rohs certified? - conform to conform to conform to
Maker - NXP NXP NXP
Parts packaging code - SON SON TSSOT
package instruction - VSON, SOLCC6,.04,14 VSON, SOLCC6,.04,20 TSSOP, TSSOP5/6,.08
Contacts - 6 6 5
Reach Compliance Code - compli compli compli
JESD-30 code - S-PDSO-N6 R-PDSO-N6 R-PDSO-G5
JESD-609 code - e3 e3 e3
length - 1 mm 1.45 mm 2.05 mm
Load capacitance (CL) - 30 pF 30 pF 30 pF
Logic integrated circuit type - AND GATE AND GATE AND GATE
MaximumI(ol) - 0.0017 A 0.0017 A 0.0017 A
Humidity sensitivity level - 1 1 1
Number of entries - 2 2 2
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - VSON VSON TSSOP
Encapsulate equivalent code - SOLCC6,.04,14 SOLCC6,.04,20 TSSOP5/6,.08
Package shape - SQUARE RECTANGULAR RECTANGULAR
Package form - SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing - TAPE AND REEL TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) - 260 260 260
power supply - 1.2/3.3 V 1.2/3.3 V 1.2/3.3 V
Prop。Delay @ Nom-Su - 24 ns 24 ns 24 ns
propagation delay (tpd) - 24 ns 24 ns 24 ns
Certification status - Not Qualified Not Qualified Not Qualified
Schmitt trigger - YES YES YES
Maximum seat height - 0.5 mm 0.5 mm 1.1 mm
Maximum supply voltage (Vsup) - 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) - 0.8 V 0.8 V 0.8 V
Nominal supply voltage (Vsup) - 1.1 V 1.1 V 1.1 V
technology - CMOS CMOS CMOS
Terminal surface - Tin (Sn) Tin (Sn) Tin (Sn)
Terminal pitch - 0.35 mm 0.5 mm 0.65 mm
Maximum time at peak reflow temperature - 30 30 30
width - 1 mm 1 mm 1.25 mm

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