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HD74ALVC162835AT

Description
ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, TSSOP-56
Categorylogic    logic   
File Size107KB,17 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric Compare View All

HD74ALVC162835AT Overview

ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, TSSOP-56

HD74ALVC162835AT Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerRenesas Electronics Corporation
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts56
Reach Compliance Codeunknown
seriesALVC/VCX/A
JESD-30 codeR-PDSO-G56
JESD-609 codee0
length14 mm
Logic integrated circuit typeBUS DRIVER
Number of digits18
Number of functions1
Number of ports2
Number of terminals56
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)6.3 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width6.1 mm
HD74ALVC162835A
18-bit Universal Bus Driver with 3-state Outputs
ADE-205-294C (Z)
Rev. 3
Oct. 2001
Description
The HD74ALVC162835A is an 18-bit universal bus driver designed for 2.3 V to 3.6 V V
CC
operation.
Data flow from A to Y is controlled by the output enable (OE). The device operates in the transparent mode
when the latch enable (LE) is high. When LE is low, the A data is latched if the clock (CLK) input is held
at a high or low logic level. If the LE is low, the A data is stored in the latch/flip flop on the low to high
transition of CLK. When
OE
is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down,
OE
should be tied to V
CC
through a
pullup registor; the minimum value of the registor is determined by the current sinking capability of the
driver.
All outputs, which are designed to sink up to 12 mA, include series dumping resistors to reduce overshoot
and undershoot.
Features
Supports PC133 and meets “PC SDRAM registered DIMM specification, Rev. 1.1”
VCC = 2.3 V to 3.6 V
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±12 mA (@VCC = 3.0 V)
All outputs have series dumping resistors, so no external resistors are required
tpd (CLK to Y) = 3.5 ns (Max) (@VCC = 3.3±0.3 V, CL = 50 pF, Ta = 0 to 85°C)
tpd (CLK to Y) = 2.5 ns (Max) (@VCC = 3.3±0.3 V, CL = 30 pF, Ta = 0 to 85°C)
Package type
Package type
TSSOP-56pin
TVSOP-56pin
Package code
TTP-56DAV
TTP-56DBV
Package suffix
T
N
Taping code
EL(1000pcs / Reel)
EL(1000pcs / Reel)

HD74ALVC162835AT Related Products

HD74ALVC162835AT HD74ALVC162835AN-EL HD74ALVC162835AT-EL HD74ALVC162835AN
Description ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, TSSOP-56 ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, TVSOP-56 ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, TSSOP-56 ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, TVSOP-56
Maker Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation
Parts packaging code TSSOP SSOP TSSOP SSOP
package instruction TSSOP, TSSOP, TSSOP, TSSOP56,.3,20 TSSOP,
Contacts 56 56 56 56
Reach Compliance Code unknown compliant unknown compliant
series ALVC/VCX/A ALVC/VCX/A ALVC/VCX/A ALVC/VCX/A
JESD-30 code R-PDSO-G56 R-PDSO-G56 R-PDSO-G56 R-PDSO-G56
length 14 mm 11.3 mm 14 mm 11.3 mm
Logic integrated circuit type BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
Number of digits 18 18 18 18
Number of functions 1 1 1 1
Number of ports 2 2 2 2
Number of terminals 56 56 56 56
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd) 6.3 ns 6.3 ns 6.3 ns 6.3 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.2 mm 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2.3 V 2.3 V 2.3 V 2.3 V
Nominal supply voltage (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.5 mm 0.4 mm 0.5 mm 0.4 mm
Terminal location DUAL DUAL DUAL DUAL
width 6.1 mm 4.4 mm 6.1 mm 4.4 mm
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