LG Semicon Co.,Ltd.
Description
The GM71C4403C is the new generation dynamic
RAM organized 1,048,576 words x 4 bit.
GM71C4403C has realized higher density, higher
performance and various functions by utilizing
advanced CMOS process technology. The
GM71C4403C offers Extended Data Out (EDO)
Mode as a high speed access Mode. Multiplexed
address inputs permit the GM71C4403C to be
packaged in a standard 300mil 20(26) pin plastic
SOJ , and standard 300mil 20(26) pin plastic TSOP
II. The package size provides high system bit
densities and is compatible with widely available
automated testing and insertion equipment. System
oriented features include single power supply of
5V+/-10% tolerance, direct interfacing capability
with high performance logic families such as
Schottky TTL.
GM71C4403C
1,048,576 WORDS x 4BIT
CMOS DYNAMIC RAM
Features
* 1,048,576 Words x 4 Bit Organization
* Extended Data Out Mode Capability
* Single Power Supply (5V+/-10%)
* Fast Access Time & Cycle Time
(Unit: ns)
t
RAC
GM71C4403C-60
GM71C4403C-70
GM71C4403C-80
60
70
80
t
CAC
15
18
20
t
RC
104
124
144
t
HPC
25
30
35
* Low Power
Active : 605/550/495mW (MAX)
Standby : 5.5mW (CMOS level : MAX)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
* All inputs and outputs TTL Compatible
*1024 Refresh Cycles/16ms
Pin Configuration
20 (26) SOJ
I/O1
I/O2
WE
RAS
A9
1
2
3
4
5
20
19
18
17
16
20 (26) TSOP II
V
SS
I/O4
I/O3
CAS
OE
I/O1
I/O2
WE
RAS
A9
1
2
3
4
5
20
19
18
17
16
V
SS
I/O4
I/O3
CAS
OE
V
SS
I/O4
I/O3
CAS
OE
20
19
18
17
16
1
2
3
4
5
I/O1
I/O2
WE
RAS
A9
A0
A1
A2
A3
V
CC
6
7
8
9
10
15
14
13
12
11
A8
A7
A6
A5
A4
A0
A1
A2
A3
V
CC
6
7
8
9
10
15
14
13
12
11
A8
A7
A6
A5
A4
A8
A7
A6
A5
A4
15
14
13
12
11
6
7
8
9
10
A0
A1
A2
A3
V
CC
NORMAL TYPE
REVERSE TYPE
(Top View)
(Top View)
1
LG Semicon
Pin Description
Pin
A0-A9
A0-A9
I/O1-I/O4
RAS
CAS
Function
Address Inputs
Refresh Address Inputs
Data Input / Data Output
Row Address Strobe
Column Address Strobe
Pin
WE
OE
V
CC
V
SS
GM71C4403C
Function
Read/Write Enable
Output Enable
Power (+5V)
Ground
Ordering Information
Type No.
GM71C4403CJ-60
GM71C4403CJ-70
GM71C4403CJ-80
GM71C4403CT-60
GM71C4403CT-70
GM71C4403CT-80
GM71C4403CR-60
GM71C4403CR-70
GM71C4403CR-80
Access Time
60ns
70ns
80ns
60ns
70ns
80ns
60ns
70ns
80ns
Package
300 Mil, 20 (26) Pin
Plastic SOJ
300 Mil, 20 (26) Pin
Plastic TSOP II
(Normal Type)
300 Mil, 20 (26) Pin
Plastic TSOP II
(Reverse Type)
Absolute Maximum Ratings*
Symbol
T
A
T
STG
V
IN
/V
OUT
V
CC
I
OUT
P
D
Parameter
Ambient Temperature under Bias
Storage Temperature (Plastic)
Voltage on any Pin Relative to V
SS
Voltage on V
CC
Relative to V
SS
Short Circuit Output Current
Power Dissipation
Rating
0 ~ 70
-55 ~ 125
-1.0 ~ 7.0
-1.0 ~ 7.0
50
1.0
Unit
C
C
V
V
mA
W
*Note: Operation at or above Absolute Maximum Ratings can adversely affect device reliability.
Recommended DC Operating Conditions
(All Voltage referenced to Vss, T
A
= 0 ~ 70C)
Symbol
V
CC
V
IH
V
IL
2
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Min
4.5
2.4
-1.0
Typ
5.0
-
-
Max
5.5
6.5
0.8
Unit
V
V
V
LG Semicon
DC Electrical Characteristics
(V
CC
= 5V+/-10%, T
A
= 0 ~ 70C)
Symbol
V
OH
V
OL
I
CC1
Parameter
Output Level
Output
“H”
Level Voltage (I
OUT
= -5mA)
Output Level
Output
“L”
Level Voltage (I
OUT
= 4.2mA)
Operating Current
Average Power Supply Operating Current
(RAS, CAS, Address Cycling: t
RC
= t
RC
min)
Standby Current (TTL)
Power Supply Standby Current
(RAS, CAS= V
IH
, D
OUT
= High-Z)
RAS-Only Refresh Current
Average Power Supply Current
RAS-Only Refresh Mode
(RAS Cycling, CAS = V
IH
, t
RC
= t
RC
min)
Extended Data Out Page Mode Current
Average Power Supply Current
Extended Data Out Mode
(RAS = V
IL
, CAS, Address Cycling: t
HPC
= t
HPC
min)
Standby Current (CMOS)
Power Supply Standby Current
(RAS, CAS= V
IH
, WE, OE, Address and D
IN
=V
IH
or V
IL
,
D
OUT
=High-Z)
CAS-before-RAS Refresh Current
(t
RC
= t
RC
min)
60ns
70ns
80ns
60ns
70ns
80ns
60ns
70ns
80ns
60ns
70ns
80ns
GM71C4403C
Min
2.4
0
-
-
-
-
-
-
-
-
-
-
-
Max Unit Note
V
CC
0.4
110
100
90
2
110
100
90
130
120
110
1
mA
mA
1, 3
mA
2
mA
mA
1, 2
V
V
I
CC2
I
CC3
I
CC4
I
CC5
I
CC6
-
-
-
-
-10
-10
110
100
90
5
10
10
mA
uA
uA
1
mA
I
CC8
Standby Current RAS = V
IH
CAS = V
IL
D
OUT
= Enable
Input Leakage Current
Any Input (0V<=V
IN
<=7V)
Output Leakage Current
(D
OUT
is Disabled, 0V<=V
OUT
<=7V)
I
I(L)
I
O(L)
Note: 1. I
CC
depends on output load condition when the device is selected. I
CC
(max) is specified at the
output open condition.
2. Address can be changed once or less while RAS = V
IL
.
3. Address can be changed once or less while CAS = V
IH
.
3
LG Semicon
Capacitance
(V
CC
= 5V+/-10%, T
A
= 25C)
Symbol
C
I1
C
I2
C
I/O
¤
GM71C4403C
Parameter
Input Capacitance (Address)
Input Capacitance (Clocks)
Data Input/Output Capacitance (Data-In/Out)
Min
-
-
-
Max
5
7
7
Unit
§Ü
§Ü
§Ü
Note
1
1
1, 2
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. CAS = V
IH
to disable D
OUT
.
AC Characteristics
(V
CC
= 5V+/-10%, T
A
= 0 ~ 70C, Notes 1, 14, 15, 16)
Test Conditions
Input level : V
IL
=0V, V
IH
=3.0V
Input rise and fall times: 2ns
Input timing reference levels: V
IL
=0.8V, V
IH
=2.4V
Output timing reference levels: V
OL
=0.8V, V
OH
=2.0V
Output load : 1 TTL gate + C
L
(100§Ü)
(Including scope and jig)
Read, Write, Read-Modify-Write and Refresh Cycles
(Common Parameters)
Symbol
Parameter
Random Read or Write Cycle Time
RAS Precharge Time
RAS Pulse Width
CAS Pulse Width
Row Address Set-up Time
Row Address Hold Time
Column Address Set-up Time
Column Address Hold Time
RAS to CAS Delay Time
RAS to Column Address Delay Time
RAS Hold Time
CAS Hold Time
CAS to RAS Precharge Time
OE to D
IN
Delay Time
OE Delay Time from D
IN
CAS Set-up Time from D
IN
Transition Time (Rise and Fall)
Refresh Period
GM71C4403
C-60
GM71C4403
C-70
GM71C4403
C-80
Min Max Min Max Min Max
104
40
-
-
124
50
-
-
144
60
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Note
t
RC
t
RP
t
RAS
t
CAS
t
ASR
t
RAH
t
ASC
t
CAH
t
RCD
t
RAD
t
RSH
t
CSH
t
CRP
t
ODD
t
DZO
t
DZC
t
T
t
REF
60
10,000
70
10,000
10
10,000
0
10
0
10
20
15
15
48
10
15
0
0
2
-
-
-
-
-
45
30
-
-
-
-
-
-
50
16
13
10,000
0
10
0
13
20
15
18
58
10
18
0
0
2
-
-
-
-
-
52
35
-
-
-
-
-
-
50
16
80
10,000
15
10,000
0
10
0
15
20
15
20
68
10
20
0
0
2
-
-
-
-
-
60
40
-
-
-
-
-
-
50
16
19
20
8
9
22
7
4
LG Semicon
Read Cycle
Symbol
Parameter
Access Time from RAS
Access Time from CAS
Access Time from Address
Access Time from OE
Read Command Setup Time
Read Command Hold Time to CAS
Read Command Hold Time to RAS
Column Address to RAS Lead Time
Column Address to CAS Lead Time
Output Buffer Turn-off Time
Output Buffer Turn-off Time to OE
CAS to D
IN
Delay Time
RAS to D
IN
Delay Time
WE to D
IN
Delay Time
OE Pulse width
Output Buffer Turn-off Time to RAS
Output Buffer Turn-off Time to WE
Output Data Hold Time
Output Data Hold Time form RAS
Read Command Hold Time from
GM71C4403
C-60
GM71C4403
C-70
GM71C4403C
GM71C4403
C-80
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
2,3,17
3, 4, 13,
17
3, 5, 13,
17
Min Max Min Max Min Max
-
-
-
-
0
0
0
30
18
-
-
15
15
15
15
-
-
60
15
30
15
-
-
-
-
-
15
15
-
-
-
-
15
15
-
-
-
-
0
0
0
35
23
-
-
18
18
18
18
-
-
70
18
35
18
-
-
-
-
-
15
15
-
-
-
-
15
15
-
-
-
-
0
0
0
40
28
-
-
20
20
20
20
80
20
40
20
-
-
-
-
-
15
15
-
-
-
-
15
15
t
RAC
t
CAC
t
AA
t
OAC
t
RCS
t
RCH
t
RRH
t
RAL
t
CAL
t
OFF
t
OEZ
t
CDD
t
RDD
t
WDD
t
OEP
t
OFR
t
WEZ
t
OH
t
OHR
t
RCHR
3,17
18
18
6,21
6
-
-
5
5
80
6,21
6
5
5
60
-
-
-
5
5
70
-
-
-
-
-
-
RAS
5
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