ADC1003S040TS datasheet, PDF - EEWORLD Datasheet

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ADC1003S040TS: DescriptionSingle 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with voltage regulator; CategoryAnalog mixed-signal IC converter; File Size117KB，20 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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ADC1003S040TS Overview

Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with voltage regulator

ADC1003S040TS Parametric

Parameter Name	Attribute value
Maker	NXP
Parts packaging code	SSOP
package instruction	5.30 MM, PLASTIC, MO-150, SOT341-1, SSOP-28
Contacts	28
Reach Compliance Code	unknow
ECCN code	EAR99
Maximum analog input voltage	2 V
Minimum analog input voltage	1.9 V
Converter type	ADC, RESISTANCE LADDER
JESD-30 code	R-PDSO-G28
length	10.2 mm
Maximum linear error (EL)	0.1953%
Number of analog input channels	1
Number of digits	10
Number of functions	1
Number of terminals	28
Maximum operating temperature	70 °C
Minimum operating temperature
Output bit code	BINARY, 2\'S COMPLEMENT BINARY
Output format	PARALLEL, WORD
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Encapsulate equivalent code	SSOP28,.3
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
power supply	5 V
Certification status	Not Qualified
Sampling rate	40 MHz
Maximum seat height	2 mm
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
width	5.3 mm

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ADC1003S030/040/050

Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with

voltage regulator

Rev. 02 — 7 August 2008

Product data sheet

1. General description

The ADC1003S030/040/050 are a family of 10-bit high-speed low-power Analog-to-Digital

Converters (ADC) for professional video and other applications. They convert the analog

input signal into 10-bit binary-coded digital words at a maximum sampling rate of 50 MHz.

All digital inputs and outputs are Transistor-Transistor Logic (TTL) and CMOS compatible,

although a low-level sine wave clock input signal is allowed.

The device includes an internal voltage reference regulator. If the application requires that

the reference is driven via external sources the recommendation is to use one of the

ADC1004S030/040/050 family.

2. Features

10-bit resolution

Sampling rate up to 50 MHz

DC sampling allowed

One clock cycle conversion only

High signal-to-noise ratio over a large analog input frequency range

(9.3 effective bits at 4.43 MHz full-scale input at f

clk

= 40 MHz)

No missing codes guaranteed

In-Range (IR) CMOS output

Levels TTL and CMOS compatible digital inputs

3 V to 5 V CMOS digital outputs

Low-level AC clock input signal allowed

Internal reference voltage regulator

Power dissipation only 235 mW (typical)

Low analog input capacitance, no buffer ampliﬁer required

No sample-and-hold circuit required

3. Applications

High-speed analog-to-digital conversion for:

Video data digitizing

Radar

Transient signal analysis

Global Positioning System (GPS) receiver

Σ∆

modulators

ADC1003S040TS Related Products

	ADC1003S040TS	ADC1003S030TS	ADC1003S040	ADC1003S030	ADC1003S050	ADC1003S050TS
Description	Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with voltage regulator	Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with voltage regulator	Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with voltage regulator	Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with voltage regulator	Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with voltage regulator	Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with voltage regulator

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