16,777,216 WORDS x 4 BIT
CMOS DYNAMIC RAM
GM71V64403C
GM71VS64403CL
Description
The GM71V(S)64403C/CL is the new generation
dynamic RAM organized 16,777,216 words by 4bits.
The GM71V(S)64403C/CL utilizes advanced CMOS
Silicon Gate Process Technology as well as
advanced circuit techniques for wide operating
margins, both internally and to the system user.
System oriented features include single power supply
of 3.3V+/-10% tolerance, direct interfacing
capability with high performance logic families such
as Schottky TTL.
The GM71V(S)64403C/CL offers Extended Data
Out(EDO) Mode as a high speed access mode.
Pin Configuration
32 SOJ / TSOP II
VCC
IO0
IO1
NC
NC
NC
VCC
/WE
/RAS
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VSS
IO3
IO2
NC
NC
VSS
/CAS
/OE
A12
A11
A10
A9
A8
A7
A6
VSS
Features
* 16,777,216 Words x 4 Bit
* Extended Data Out (EDO) Mode Capability
* Fast Access Time & Cycle Time
(Unit: ns)
A1
A2
A3
A4
A5
VCC
t
RAC
GM71V(S)64403C/CL-5
GM71V(S)64403C/CL-6
50
60
t
AA
25
30
t
CAC
13
15
t
RC
84
104
t
HPC
20
25
*Power dissipation
- Active : 432mW/396mW(MAX)
- Standby : 1.8 mW ( CMOS level : MAX )
0.54mW ( L-Version : MAX)
*EDO page mode capability
*Access time : 50ns/60ns (max)
*Refresh cycles
- RAS only Refresh
8192 cycles/64
§ Â
(GM71V64403C)
8192 cycles/128§
Â
(GM71VS64403CL)(L_Version)
*CBR & Hidden Refresh
4096 cycles/64
§ Â
(GM71V64403C)
4096cycles/128
§ Â
(GM71VS64403CL)( L-Version )
*4 variations of refresh
-RAS-only refresh
-CAS-before-RAS refresh
-Hidden refresh
-Self refresh (L-Version)
*Single Power Supply of 3.3V+/-10 % with a built-in VBB generator
*Battery Back Up Operation ( L-Version )
Rev 0.1 / Apr’
01
(Top View)
1
GM71V64403C
GM71VS64403CL
Pin Description
Pin
A0-A12
A0-A12
RAS
CAS
OE
Function
Address Inputs
Refresh Address Inputs
Row Address Strobe
Column Address Strobe
Output Enable
Pin
WE
I/O0 - I/O3
V
CC
V
SS
NC
Function
Write Enable
Data Input / Output
Power (+3.3V)
Ground
No Connection
Ordering Information
Type No.
GM71V(S)64403C/CLJ-5
GM71V(S)64403C/CLJ-6
GM71V(S)64403C/CLT-5
GM71V(S)64403C/CLT-6
Access Time
50§
À
60§
À
50§
À
60§
À
Package
400 Mil
32Pin
Plastic SOJ
400 Mil
32Pin
Plastic TSOP II
Absolute Maximum Ratings*
Symbol
T
STG
V
T
V
CC
I
OUT
P
T
Parameter
Storage Temperature (Plastic)
Voltage on any Pin Relative to V
SS
Voltage on V
CC
Relative to V
SS
Short Circuit Output Current
Power Dissipation
Rating
-55 to 125
-0.5 to V
CC
+ 0.5
(MAX ; 4.6V)
-0.5 to 4.6
50
1.0
Unit
C
V
V
mA
W
*Note : Operation at or above Absolute Maximum Ratings can adversely affect device reliability.
Recommended DC Operating Conditions
(T
A
= 0 ~ 70C)
Symbol
V
CC
V
SS
V
IH
V
IL
T
A
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Ambient Temperature under Bias
Min
3.0
0
2.0
-0.3
0
Typ
3.3
0
-
-
-
Max
3.6
0
Vcc+0.3
0.8
70
Unit
V
V
V
V
C
Notes
1,2
2
1
1
Rev 0.1 / Apr’
01
2
GM71V64403C
GM71VS64403CL
DC Electrical Characteristics:
(V
CC
= 3.3V+/-10%, T
A
= 0 ~ 70C)
Symbol
V
OH
V
OL
I
CC1
Parameter
Output Level
Output Level Voltage (I
OUT
= -2mA)
Output Level
Output Level Voltage (I
OUT
= 2mA)
Operating Current (
t
RC
=
t
RC
min)
50ns
60ns
I
CC2
Standby Current (TTL interface)
Power Supply Standby Current
(RAS, CAS= V
IH
, D
OUT
= High-Z)
RAS-Only Refresh Current
( t
RC
= t
RC
min)
Extended Data Out page Mode Current
(RAS = V
IL
, CAS, Address Cycling: t
HPC
= t
HPC
min)
CMOS interface
(RAS, CAS>=V
CC
-0.2V, D
OUT
= High-Z)
Standby Current(L_Version)
I
CC6
CAS-before-RAS Refresh Current
(t
RC
= t
RC
min)
50ns
60ns
50ns
60ns
50ns
60ns
Min
2.4
0
-
-
-
-
-
-
-
-
Max
V
CC
0.4
120
110
2
120
110
110
mA
100
0.5
mA
1,3
mA
2
mA
Unit Note
V
V
mA
1,2
I
CC3
I
CC4
I
CC5
-
-
-
-
300
140
130
500
uA
mA
uA
4
I
CC7
I
CC8
Battery Back Up Operating Current(Standby with CBR)
(tRC=31.25us,tRAS=300ns,Dout=High-Z)
Standby Current (CMOS)
Power Supply Standby Current
RAS = V
IH
, CAS = V
IL
,
D
OUT
= Enable
Self Refresh Current
(RAS, CAS <=0.2V,Dout=High-Z)
Input Leakage Current, Any Input
(0V<=V
IN
<=Vcc)
Output Leakage Current
(D
OUT
is Disabled, 0V<=V
OUT
<=Vcc)
4, 5
-
5
mA
1
I
CC9
I
I(L)
I
O(L)
-
-5
-5
400
5
5
uA
uA
uA
5
Note: 1. I
CC
depends on output load condition when the device is selected. I
CC(max)
is specified at the
output open condition.
2. Address can be changed once or less while RAS = V
IL
.
3. Measured with one sequential address change per EDO cycle, t
HPC
.
4. V
IH
>=V
CC
-0.2V, 0V<=V
IL
<=0.2V
5. L-Version
Rev 0.1 / Apr’
01
3
GM71V64403C
GM71VS64403CL
Capacitance
(V
CC
= 3.3V+/-10%, T
A
= 25C)
Symbol
C
I1
C
I2
C
I/O
Parameter
Input Capacitance (Address)
Input Capacitance (Clocks)
Output Capacitance (Data-in,Data-Out)
Typ
-
-
-
Max
5
7
7
Unit
§ Ü
§ Ü
§ Ü
Note
1
1
1, 2
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. RAS, CAS = V
IH
to disable D
OUT
.
AC Characteristics
(V
CC
= 3.3V+/-10%, T
A
= 0 ~ 70C, Notes 1, 2,19)
Test Conditions
Input rise and fall times : 2ns
Output timing reference levels : V
OL
/V
OH
= 0.8/2.0V
Input level : V
IL
/V
IH
= 0.0/3.0V
Output load : 1 TTL gate+C
L
(100pF)
Input timing reference levels : V
IL
/V
IH
= 0.8/2.0V
(Including scope and jig)
Read, Write, Read-Modify-Write and Refresh Cycles
(Common Parameters)
GM71V(S)64403C/CL-5 GM71V(S)64403C/CL-6
Symbol
Parameter
Min
Max
-
-
-
10000
10000
-
-
-
-
37
25
-
-
-
-
-
-
50
64
128
Unit
Notes
Min
104
40
10
60
10
0
10
0
10
14
12
15
40
5
15
0
0
2
-
-
Max
-
-
-
10000
10000
-
-
-
-
45
30
-
-
-
-
-
-
50
64
128
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ Â
§ Â
5
6
6
7
8192
cycles
8192
cycles
t
RC
t
RP
t
CP
t
RAS
t
CAS
t
ASR
t
RAH
t
ASC
t
CAH
t
RCD
t
RAD
t
RSH
t
CSH
t
CRP
t
ODD
t
DZO
t
DZC
t
T
t
REF
Random Read or Write Cycle Time
RAS Precharge Time
CAS Precharge Time
RAS Pulse Width
CAS Pulse Width
Row Address Set-up Time
Row Address Hold Time
Column Address Set-up Time
Column Address Hold Time
RAS to CAS Delay Time
RAS to Column Address Delay Time
RAS Hold Time
CAS Hold Time
CAS to RAS Precharge Time
OE to D
IN
Delay Time
OE Delay Time from D
IN
CAS Delay Time from D
IN
TransitionTime (Rise and Fall)
Refresh Period
Refresh Period ( L-Version )
84
30
8
50
8
0
8
0
8
12
10
13
35
5
13
0
0
2
-
-
3
4
Rev 0.1 / Apr’
01
4
GM71V64403C
GM71VS64403CL
Read Cycles
Symbol
Parameter
Access Time from RAS
Access Time from CAS
Access Time from Column Address
Access Time from OE
Read Command Set-up Time
Read Command Hold Time to CAS
Read Command Hold Time to RAS
Column Address to RAS Lead Time
Column Address to CAS Lead Time
Output Buffer Turn-off Delay Time from
CAS
Output Buffer Turn-off Delay Time from OE
CAS to D
IN
Delay Time
RAS to D
IN
Delay Time
WE to D
IN
Delay Time
Output Buffer Turn-off Delay Time from RAS
Output Buffer Turn-off Delay Time from WE
Output Data Hold Time
Output Data Hold Time from RAS
Read Command Hold Time from RAS
Output data hold time from OE
CAS to Output in Low - Z
GM71V(S)64403C/CL-5 GM71V(S)64403C/CL-6
Unit
Notes
Min
Max
50
13
25
13
-
-
-
-
-
13
13
-
-
-
13
13
-
-
-
-
-
Min
-
-
-
-
0
0
0
30
18
-
-
15
15
15
-
-
3
3
60
3
0
Max
60
15
30
15
-
-
-
-
-
15
15
-
-
-
15
15
-
-
-
-
-
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
§ À
t
RAC
t
CAC
t
AA
t
OAC
t
RCS
t
RCH
t
RRH
t
RAL
t
CAL
t
OFF
t
OEZ
t
CDD
t
RDD
t
WDD
t
OFR
t
WEZ
t
OH
t
OHR
t
RCHR
t
OHO
t
CLZ
-
-
-
-
0
0
0
25
15
-
-
13
13
13
-
-
3
3
50
3
0
8,9
9,10,17
9,11,17
9
12
12
13,21
13
5
13,21
13
21
21
Rev 0.1 / Apr’
01
5
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