27HC256L-70I/K datasheet, PDF - EEWORLD Datasheet

27HC256L-70I/K: Description32K X 8 UVPROM, 70 ns, CQCC32, CERAMIC, LCC-32; Categorystorage storage; File Size231KB，8 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com

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27HC256L-70I/K Overview

32K X 8 UVPROM, 70 ns, CQCC32, CERAMIC, LCC-32

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Parts packaging code	QFJ
package instruction	CERAMIC, LCC-32
Contacts	32
Reach Compliance Code	_compli
ECCN code	EAR99
Maximum access time	70 ns
I/O type	COMMON
JESD-30 code	R-CQCC-N32
JESD-609 code	e0
length	13.97 mm
memory density	262144 bi
Memory IC Type	UVPROM
memory width	8
Number of functions	1
Number of terminals	32
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	32KX8
Output characteristics	3-STATE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN
Encapsulate equivalent code	LCC32,.45X.55
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programming voltage	12.75 V
Certification status	Not Qualified
Maximum seat height	3.048 mm
Maximum standby current	0.0001 A
Maximum slew rate	0.136 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	11.43 mm
Base Number Matches	1

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