M470T2953CZ3-LE6 datasheet, PDF

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M470T2953CZ3-LE6: DescriptionDDR DRAM Module, 128MX64, 0.45ns, CMOS, ROHS COMPLIANT, SODIMM-200; Categorystorage storage; File Size341KB，20 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

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M470T2953CZ3-LE6 Overview

DDR DRAM Module, 128MX64, 0.45ns, CMOS, ROHS COMPLIANT, SODIMM-200

M470T2953CZ3-LE6 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Parts packaging code	SODIMM
package instruction	DIMM, DIMM200,24
Contacts	200
Reach Compliance Code	compli
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	0.45 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	333 MHz
I/O type	COMMON
JESD-30 code	R-XZMA-N200
memory density	8589934592 bi
Memory IC Type	DDR DRAM MODULE
memory width	64
Humidity sensitivity level	2
Number of functions	1
Number of ports	1
Number of terminals	200
word count	134217728 words
character code	128000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	95 °C
Minimum operating temperature
organize	128MX64
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM200,24
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	260
power supply	1.8 V
Certification status	Not Qualified
refresh cycle	8192
self refresh	YES
Maximum standby current	0.08 A
Maximum slew rate	1.72 mA
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	NO
technology	CMOS
Temperature level	OTHER
Terminal form	NO LEAD
Terminal pitch	0.6 mm
Terminal location	ZIG-ZAG
Maximum time at peak reflow temperature	40
Base Number Matches	1

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SODIMM

DDR2 SDRAM

DDR2 Unbuffered SODIMM

200pin Unbuffered SODIMM based on 512Mb C-die

64bit Non-ECC

60FBGA & 84FBGA with Pb-Free

(RoHS compliant)

INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,

AND IS SUBJECT TO CHANGE WITHOUT NOTICE.

NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,

TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL

INFORMATION IN THIS DOCUMENT IS PROVIDED

ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.

1. For updates or additional information about Samsung products, contact your nearest Samsung office.

2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar

applications where Product failure couldresult in loss of life or personal or physical harm, or any military or

defense application, or any governmental procurement to which special terms or provisions may apply.

* Samsung Electronics reserves the right to change products or specification without notice.

Page 1 of 20

Rev. 1.6 March 2007

SODIMM

Table of Contents

DDR2 SDRAM

1.0 DDR2 Unbuffered SODIMM Ordering Information .................................................................... 4

2.0 Features ........................................................................................................................................ 4

3.0 Address Configuration ................................................................................................................ 4

4.0 Pin Configurations (Front side/Back side) ................................................................................ 5

5.0 Pin Description ............................................................................................................................. 5

6.0 Input/Output Functional Description .......................................................................................... 6

7.0 Functional Block Diagram : ......................................................................................................... 7

7.1 512MB, 64Mx64 Module - M470T6554CZ3/M470T6554CZ0

.................................................................. 7

7.2 256MB, 32Mx64 Module - M470T3354CZ3/M470T3354CZ0

.................................................................. 8

7.3 1GB, 128Mx64 Module - M470T2953CZ3/M470T2953CZ0

.................................................................... 9

8.0 Absolute Maximum DC Ratings ................................................................................................ 10

9.0 AC & DC Operating Conditions ................................................................................................ 10

..................................................................... 10

9.2 Operating Temperature Condition

................................................................................................ 11

9.3 Input DC Logic Level

................................................................................................................... 11

9.4 Input AC Logic Level

................................................................................................................... 11

9.5 AC Input Test Conditions

............................................................................................................ 11

10.0 IDD Specification Parameters Definition ............................................................................... 12

11.0 Operating Current Table .......................................................................................................... 13

11.1 M470T6554CZ3/M470T6554CZ0 : 64Mx64 512MB Module

.............................................................. 13

11.2 M470T3354CZ3/M470T3354CZ0 : 32Mx64 256MB Module

.............................................................. 13

11.3 M470T2953CZ3/M470T2953CZ0 : 128Mx64 1GB Module

............................................................... 14

12.0 Input/Output Capacitance ....................................................................................................... 15

13.0 Electrical Characteristics & AC Timing for DDR2-800/667/533/400 ..................................... 15

13.1 Refresh Parameters by Device Density

...................................................................................... 15

13.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin

............................................ 15

13.3 Timing Parameters by Speed Grade

.......................................................................................... 16

14.0 Physical Dimensions : ............................................................................................................. 18

14.1 32Mbx16 based 64Mx64 Module(2 Rank)

.................................................................................... 18

14.2 32Mbx16 based 32Mx64 Module(1 Rank)

..................................................................................... 19

14.3 64Mbx8 based 128Mx64 Module(2 Ranks)

.................................................................................. 20

9.1 Recommended DC Operating Conditions (SSTL - 1.8)

Page 2 of 20

Rev. 1.6 March 2007

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