LE80539UE0092MXSL9JQ datasheet, PDF

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LE80539UE0092MXSL9JQ: DescriptionMicroprocessor, 667MHz, CMOS, PBGA479, ROHS COMPLIANT, FCBGA-479; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，91 Pages; ManufacturerIntel; Websitehttp://www.intel.com/; Environmental Compliance

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LE80539UE0092MXSL9JQ Overview

Microprocessor, 667MHz, CMOS, PBGA479, ROHS COMPLIANT, FCBGA-479

LE80539UE0092MXSL9JQ Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Intel
package instruction	HBGA,
Reach Compliance Code	compliant
ECCN code	3A001.A.3
Address bus width	29
boundary scan	YES
maximum clock frequency	667 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-PBGA-B479
length	35 mm
low power mode	YES
Number of terminals	479
Package body material	PLASTIC/EPOXY
encapsulated code	HBGA
Package shape	SQUARE
Package form	GRID ARRAY, HEAT SINK/SLUG
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Maximum seat height	2.963 mm
speed	667 MHz
Maximum supply voltage	1.3 V
Minimum supply voltage	1.16 V
Nominal supply voltage	1.2 V
surface mount	YES
technology	CMOS
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	35 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR

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Intel® Core™ Duo Processor and

Intel® Core™ Solo Processor

on 65 nm Process

Datasheet

January 2007

Document Number: 309221-006

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR

OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS

OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING

TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE,

MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for

use in medical, life saving, or life sustaining applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for

future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The Intel® Core™ Duo processor and the Intel® Core™ Solo processor may contain design defects or errors known as errata which may cause the

product to deviate from published specifications. Current characterized errata are available on request.

Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different

processor families. See http://www.intel.com/products/processor_number for details.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Intel, Intel Core Duo, Intel Core Solo, Pentium, Intel SpeedStep, MMX and the Intel logo are registered trademarks or trademarks of Intel Corporation

and its subsidiaries in the United States and other countries.

*Other names and brands may be claimed as the property of others.

Datasheet

Contents

Introduction

.............................................................................................................. 7

1.1

Terminology ....................................................................................................... 9

1.2

References ......................................................................................................... 9

Low Power Features

................................................................................................ 11

2.1

Clock Control and Low Power States .................................................................... 11

2.1.1 Core Low-Power States ........................................................................... 13

2.1.1.1 C0 State .................................................................................. 13

2.1.1.2 C1/AutoHALT Powerdown State .................................................. 13

2.1.1.3 C1/MWAIT Powerdown State ...................................................... 13

2.1.1.4 Core C2 State........................................................................... 13

2.1.1.5 Core C3 State........................................................................... 14

2.1.1.6 Core C4 State........................................................................... 14

2.1.2 Package Low Power States ...................................................................... 14

2.1.2.1 Normal State............................................................................ 14

2.1.2.2 Stop-Grant State ...................................................................... 14

2.1.2.3 Stop Grant Snoop State ............................................................. 15

2.1.2.4 Sleep State .............................................................................. 15

2.1.2.5 Deep Sleep State ...................................................................... 16

2.1.2.6 Deeper Sleep State ................................................................... 16

2.2

Enhanced Intel SpeedStep® Technology .............................................................. 17

2.3

Extended Low Power States ................................................................................ 18

2.4

FSB Low Power Enhancements ............................................................................ 19

2.5

Processor Power Status Indicator (PSI#) Signal..................................................... 19

Electrical Specifications

........................................................................................... 21

3.1

Power and Ground Pins ...................................................................................... 21

3.2

FSB Clock (BCLK[1:0]) and Processor Clocking ...................................................... 21

3.3

Voltage Identification ......................................................................................... 21

3.4

Catastrophic Thermal Protection .......................................................................... 24

3.5

Signal Terminations and Unused Pins ................................................................... 25

3.6

FSB Frequency Select Signals (BSEL[2:0])............................................................ 25

3.7

FSB Signal Groups............................................................................................. 25

3.8

CMOS Signals ................................................................................................... 27

3.9

Maximum Ratings.............................................................................................. 27

3.10 Processor DC Specifications ................................................................................ 28

Package Mechanical Specifications and Pin Information

.......................................... 41

4.1

Package Mechanical Specifications ....................................................................... 41

4.1.1 Package Mechanical Drawings .................................................................. 41

4.1.2 Processor Component Keep-Out Zones ...................................................... 46

4.1.3 Package Loading Specifications ................................................................ 46

4.1.4 Processor Mass Specifications .................................................................. 46

4.2

Processor Pinout and Pin List .............................................................................. 47

4.3

Alphabetical Signals Reference ............................................................................ 49

Thermal Specifications and Design Considerations

.................................................. 79

5.1

Thermal Specifications ....................................................................................... 85

5.1.1 Thermal Diode ....................................................................................... 85

5.1.2 Thermal Diode Offset .............................................................................. 87

5.1.3 Intel® Thermal Monitor........................................................................... 87

5.1.4 Digital Thermal Sensor (DTS)................................................................... 89

5.1.5 Out of Specification Detection .................................................................. 90

Datasheet

5.1.6

PROCHOT# Signal Pin .............................................................................90

Figures

Package-Level Low Power States ................................................................................12

Core Low Power States..............................................................................................12

Active VCC and ICC Loadline for Intel Core Duo Processor (SV, LV & ULV) and

Intel Core Solo Processor SV ......................................................................................35

Deeper Sleep V

and I

Loadline for Intel Core Duo Processor (SV, LV & ULV) and

Intel Core Solo Processor SV ......................................................................................36

Active VCC and ICC Loadline for Intel Core Solo Processor ULV .......................................37

Deeper Sleep V

and I

Loadline for Intel Core Solo Processor ULV ..............................38

Micro-FCPGA Processor Package Drawing (Sheet 1 of 2) ................................................42

Micro-FCPGA Processor Package Drawing (Sheet 2 of 2) ................................................43

Micro-FCBGA Processor Package Drawing (Sheet 1 of 2) ................................................44

Micro-FCBGA Processor Package Drawing (Sheet 2 of 2) ...............................................45

Tables

Coordination of Core-Level Low Power States at the Package Level .................................11

Voltage Identification Definition ..................................................................................21

BSEL[2:0] Encoding for BCLK Frequency......................................................................25

FSB Pin Groups ........................................................................................................26

Processor DC Absolute Maximum Ratings.....................................................................27

Voltage and Current Specifications for Intel Core Duo Processor SV (Standard Voltage) .....28

Voltage and Current Specifications for Intel Core Solo Processor SV (Standard Voltage) .....30

Voltage and Current Specifications for Intel Core Duo Processor LV (Low Voltage) .............31

Voltage and Current Specifications Intel Core Duo Processor Ultra Low Voltage (ULV) ........32

Voltage and Current Specifications for Intel Core Solo Processor ULV (Ultra Low Voltage) ...33

FSB Differential BCLK Specifications ............................................................................39

AGTL+ Signal Group DC Specifications ........................................................................39

CMOS Signal Group DC Specifications..........................................................................40

Open Drain Signal Group DC Specifications ..................................................................40

The Coordinates of the Processor Pins as Viewed from the Top of the Package ..................47

The Coordinates of the Processor Pins as Viewed from the Top of the Package .................48

Signal Description.....................................................................................................49

Pin Listing by Pin Name .............................................................................................59

Pin Listing by Pin Number ..........................................................................................69

Power Specifications for the Intel Core Duo Processor SV (Standard Voltage) ...................80

Power Specifications for the Intel Core Solo Processor SV (Standard Voltage) ...................81

Power Specifications for the Intel Core Duo Processor LV (Low Voltage) ...........................82

Power Specifications for the Intel Core Duo Processor, Ultra Low Voltage (ULV) ................83

Power Specifications for the Intel Core Solo Processor ULV (Ultra Low Voltage) .................84

Thermal Diode Interface ............................................................................................85

Thermal Diode Parameters using Diode Mode ...............................................................86

Thermal Diode Parameters using Transistor Mode .........................................................86

Thermal Diode n

trim

and Diode Correction Toffset..........................................................87

Datasheet

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