EE PLD, 12ns, 128-Cell, CMOS, PQCC84,
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | Vantis Corporation |
| Reach Compliance Code | unknown |
| Other features | 128 MACROCELLS; 4 EXTERNAL CLOCKS; SHARED INPUT/CLOCK; PROGRAMMABLE POLARITY |
| maximum clock frequency | 50 MHz |
| In-system programmable | NO |
| JESD-30 code | S-PQCC-J84 |
| JESD-609 code | e0 |
| JTAG BST | NO |
| Dedicated input times | 2 |
| Number of I/O lines | 64 |
| Number of macro cells | 128 |
| Number of terminals | 84 |
| Maximum operating temperature | 85 °C |
| Minimum operating temperature | -40 °C |
| organize | 2 DEDICATED INPUTS, 64 I/O |
| Output function | MACROCELL |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | QCCJ |
| Encapsulate equivalent code | LDCC84,1.2SQ |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| power supply | 3.3 V |
| Programmable logic type | EE PLD |
| propagation delay | 12 ns |
| Certification status | Not Qualified |
| Maximum supply voltage | 3.6 V |
| Minimum supply voltage | 3 V |
| Nominal supply voltage | 3.3 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | INDUSTRIAL |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | J BEND |
| Terminal pitch | 1.27 mm |
| Terminal location | QUAD |