Philips Semiconductors
Product specification
Pager baseband controller
CONTENTS
1
2
3
4
5
6
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
6.15
6.16
6.17
6.18
6.19
6.20
6.21
6.22
7
7.1
8
9
10
11
12
13
FEATURES
ORDERING INFORMATION
GENERAL DESCRIPTION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
General
CPU timing
Overview on the different clocks used within
the PCA5007
Memory organization
Addressing
I/O facilities
Timer/event counters
I
2
C-bus serial I/O
Serial interface SIO0: UART
76.8 kHz oscillator
Clock correction
6 MHz oscillator
Real-time clock
Wake-up counter
Tone generator
Watchdog timer
2 or 4-FSK demodulator, filter and clock
recovery circuit
AFC-DAC
Interrupt system
Idle and power-down operation
Reset
DC/DC converter
INSTRUCTION SET
Instruction Map
LIMITING VALUES
EXTERNAL COMPONENTS
DC CHARACTERISTICS
AC CHARACTERISTICS
CHARACTERISTIC CURVES
TEST AND APPLICATION INFORMATION
15.1
15.2
15.3
15.4
15.5
15.6
15.7
15.8
15.9
15.10
16
17
18
19
19.1
19.2
19.3
19.4
20
21
22
14
14.1
14.2
14.3
15
PCA5007
APPENDIX 1: SPECIAL MODES OF THE
PCA5007
Overview
OTP parallel programming mode
Test modes
APPENDIX 2: THE PARALLEL
PROGRAMMING MODE
Introduction
General description
Entering the parallel programming mode
Address space
Single byte programming
Multiple byte programming
High voltage timing
OTP test modes
Signature bytes
Security
APPENDIX 3: OS SHEET
APPENDIX 4: BONDING PAD LOCATIONS
PACKAGE OUTLINE
SOLDERING
Introduction
Reflow soldering
Wave soldering
Repairing soldered joints
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I
2
C COMPONENTS
1998 Oct 07
2
Philips Semiconductors
Product specification
Pager baseband controller
1
FEATURES
PCA5007
•
Operating temperature from:
−10
to +55
°C
•
Supply voltage range with on-chip DC/DC converter:
0.9 to 1.6 V
•
Low operating and standby current consumption
•
On-chip DC/DC converter generates the supply voltage
for the PCA5007 and external circuitry from a single cell
battery
•
Battery low detector
•
Low electromagnetic noise emission
•
Full static asynchronous 80C51 CPU (8-bit CPU)
•
Recovery from lowest power standby Idle mode to full
speed operation within microseconds
•
20 kbytes of One-Time Programmable (OTP) memory
and 1-kbyte of RAM on-chip
•
27 general purpose I/O port lines (4 ports with interrupt
possibility)
•
15 different interrupt sources with selectable priority
•
2 standard timer/event counters T0 and T1
•
I
2
C-bus serial port (single 100 kHz master transmitter
and receiver)
•
Subset of standard UART serial port (8 and 9-bit
transmission at 4800/9600 bits/s)
•
76.8 kHz crystal oscillator reference with digital clock
correction for real time and paging protocol
•
Real-Time Clock (RTC)
•
Receiver and synthesizer control
– Receiver control by software through general
purpose I/Os
– Synthesizer control by software through general
purpose I/Os
– 6-bit DAC for AFC to the receiver local oscillator
– Dedicated protocol timer.
2
ORDERING INFORMATION
TYPE
NUMBER
(1)
PACKAGE
PRODUCT TYPE
NAME
LQFP48
DESCRIPTION
plastic low profile quad flat package; 48 leads;
body 7
×
7
×
1.4 mm
VERSION
SOT313-2
•
Decoding of paging data
– POCSAG or APOC phase 1, advanced high speed
paging protocols are also supported
– Supported data rates: 1200, 1600, 2400 and 3200
symbols/s using a 76.8 kHz crystal oscillator
– Demodulation of Zero-IF I and Q 4 or 2 level FSK
input or direct data input
– Noise filtering of data input and symbol clock
reconstruction
– De-interleaving, error checking and correction, sync
word detection address recognition, buffering and
more is done in software
– All user functions (keypad interface, alerter control,
display, etc.) are implemented in software.
•
Musical tone generator for beeper, controlled by the
microcontroller
•
Watchdog timer
•
48-pin LQFP package.
PCA5007H/XXX pre-programmed OTP
Note
1. Please refer to the Order Entry Form (OEF) for this device for the full type number to use when ordering. This type
number will also specify the required OTP code.
1998 Oct 07
3
Philips Semiconductors
Product specification
Pager baseband controller
3
GENERAL DESCRIPTION
PCA5007
The instruction set of the PCA5007 is based on that of the
80C51. The PCA5007 also functions as an arithmetic
processor having facilities for both binary and BCD
arithmetic plus bit-handling capabilities. The instruction set
consists of over 100 instructions: 49 one-byte,
46 two-byte, and 16 three-byte.
This data sheet details the properties of the PCA5007.
For details of the I
2
C-bus functions see
“The I
2
C-bus and
how to use it”.
For details on the basic 80C51 properties
and features see
“Data Handbook IC20”.
The PCA5007 pager baseband controller is manufactured
in an advanced CMOS/OTP technology.
The PCA5007 is an 8-bit microcontroller especially suited
for pagers. For this purpose, features such as a
4 or 2 level FSK demodulator, filter, clock recovery,
protocol timer, DC/DC converter optimized for small
paging systems and RTC are integrated on-chip.
The device is optimized for low power consumption.
The PCA5007 has several software selectable modes for
power reduction: Idle and power-down mode of the
microcontroller, and standby and off mode of the DC/DC
converter.
1998 Oct 07
4