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CY7C09269-9AI

Description
Dual-Port SRAM, 16KX16, 9ns, CMOS, PQFP100, PLASTIC, TQFP-100
Categorystorage    storage   
File Size540KB,17 Pages
ManufacturerCypress Semiconductor
Download Datasheet Parametric View All

CY7C09269-9AI Overview

Dual-Port SRAM, 16KX16, 9ns, CMOS, PQFP100, PLASTIC, TQFP-100

CY7C09269-9AI Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCypress Semiconductor
Parts packaging codeQFP
package instructionPLASTIC, TQFP-100
Contacts100
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time9 ns
Other featuresAUTOMATIC POWER DOWN
Maximum clock frequency (fCLK)67 MHz
I/O typeCOMMON
JESD-30 codeS-PQFP-G100
JESD-609 codee0
length14 mm
memory density262144 bit
Memory IC TypeDUAL-PORT SRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of ports2
Number of terminals100
word count16384 words
character code16000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize16KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Encapsulate equivalent codeQFP100,.63SQ,20
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)240
power supply5 V
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum standby current0.0005 A
Minimum standby current4.5 V
Maximum slew rate0.41 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width14 mm
025/0251
PRELIMINARY
CY7C09269/79/89
CY7C09369/79/89
16K/32K/64K x16/18
Synchronous Dual Port Static RAM
Features
• True Dual-Ported memory cells which allow simulta-
neous access of the same memory location
• 6 Flow-Through/Pipelined devices
— 16K x 16/18 organization (CY7C09269/369)
— 32K x 16/18 organization (CY7C09279/379)
— 64K x 16/18 organization (CY7C09289/389)
• 3 Modes
— Flow-Through
— Pipelined
— Burst
• Pipelined output mode on both ports allows fast
100-MHz cycle time
• 0.35-micron CMOS for optimum speed/power
• High-speed clock to data access 6.5/7.5/9/12 ns (max.)
• Low operating power
— Active= 195 mA (typical)
— Standby= 0.05 mA (typical)
• Fully synchronous interface for easier operation
• Burst counters increment addresses internally
— Shorten cycle times
— Minimize bus noise
— Supported in Flow-Through and Pipelined modes
Dual Chip Enables for easy depth expansion
Upper and Lower Byte Controls for Bus Matching
Automatic power-down
Commercial and Industrial temperature ranges
Available in 100-pin TQFP
Pin-compatible and functionally equivalent to
IDT709269, IDT70927, and IDT709279
Logic Block Diagram
R/W
L
UB
L
R/W
R
UB
R
CE
0L
CE
1L
LB
L
OE
L
1
0/1
1
0/1
0
0
CE
0R
CE
1R
LB
R
OE
R
FT/Pipe
L
[1]
0/1
1b 0b 1a 0a
b
a
0a 1a 0b 1b
a
b
0/1
FT/Pipe
R
8/9
[1]
8/9
I/O
8/9L
–I/O
15/17L
[2]
I/O
8/9R
–I/O
15/17R
8/9
I/O
Control
I/O
Control
8/9
14/15/16
I/O
0L
–I/O
7/8L
A
0L
–A
13/14/15L
CLK
L
ADS
L
CNTEN
L
CNTRST
L
[3]
I/O
0R
–I/O
7/8R
14/15/16
[2]
Counter/
Address
Register
Decode
True Dual-Ported
RAM Array
Counter/
Address
Register
Decode
A
0R
–A
13/14/15R
CLK
R
ADS
R
CNTEN
R
CNTRST
R
[3]
Notes:
1. I/O
8
–I/O
15
for x16 devices; I/O
9
–I/O
17
for x18 devices.
2. I/O
0
–I/O
7
for x16 devices. I/O
0
–I/O
8
for x18 devices.
3. A
0
–A
13
for 16K; A
0
–A
14
for 32K; A
0
–A
15
for 64K devices.
For the most recent information, visit the Cypress web site at www.cypress.com
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
• 408-943-2600
November 23, 1998
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