MT47H32M8BP-37E:B datasheet, PDF

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MT47H32M8BP-37E:B: DescriptionDDR DRAM, 32MX8, 0.5ns, CMOS, PBGA60, 8 X 12 MM, ROHS COMPLIANT, FBGA-60; Categorystorage storage; File Size9MB，133 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT47H32M8BP-37E:B Overview

DDR DRAM, 32MX8, 0.5ns, CMOS, PBGA60, 8 X 12 MM, ROHS COMPLIANT, FBGA-60

MT47H32M8BP-37E:B Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Micron Technology
Parts packaging code	BGA
package instruction	TFBGA, BGA60,9X11,32
Contacts	60
Reach Compliance Code	not_compliant
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	0.5 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	266 MHz
I/O type	COMMON
interleaved burst length	4,8
JESD-30 code	R-PBGA-B60
JESD-609 code	e1
length	12 mm
memory density	268435456 bit
Memory IC Type	DDR DRAM
memory width	8
Number of functions	1
Number of ports	1
Number of terminals	60
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	32MX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA60,9X11,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
power supply	1.8 V
Certification status	Not Qualified
refresh cycle	8192
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	4,8
Maximum standby current	0.005 A
Maximum slew rate	0.24 mA
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	8 mm

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256Mb: x4, x8, x16 DDR2 SDRAM

Features

DDR2 SDRAM

MT47H64M4 – 16 Meg x 4 x 4 banks

MT47H32M8 – 8 Meg x 8 x 4 banks

MT47H16M16 – 4 Meg x 16 x 4 banks

Features

•

Vdd = +1.8V ±0.1V, VddQ = +1.8V ±0.1V

JEDEC-standard 1.8V I/O (SSTL_18-compatible)

Differential data strobe (DQS, DQS#) option

4n-bit prefetch architecture

Duplicate output strobe (RDQS) option for x8

DLL to align DQ and DQS transitions with CK

4 internal banks for concurrent operation

Programmable CAS latency (CL)

Posted CAS additive latency (AL)

WRITE latency = READ latency - 1

Selectable burst lengths (BL): 4 or 8

Adjustable data-output drive strength

64ms, 8,192-cycle refresh

On-die termination (ODT)

Industrial temperature (IT) option

Automotive temperature (AT) option

RoHS compliant

Supports JEDEC clock jitter specification

Options

•

Configuration

–

64 Meg x 4 (16 Meg x 4 x 4 banks)

–

32 Meg x 8 (8 Meg x 8 x 4 banks)

–

16 Meg x 16 (4 Meg x 16 x 4 banks)

•

FBGA package (Pb-free)

–

60-ball FBGA (8mm x 12mm) x4, x8

–

84-ball FBGA (8mm x 14mm) x16

•

FBGA package (lead solder)

–

60-ball FBGA (8mm x 12mm) x4, x8

–

84-ball FBGA (8mm x 14mm) x16

•

Timing – cycle time

–

3.0ns @ CL = 5 (DDR2-667)

–

3.75ns @ CL = 4 (DDR2-533)

–

5.0ns @ CL = 3 (DDR2-400)

•

Self refresh

–

Standard

–

Low-power

•

Operating temperature

–

Commercial (0°C

≤

85°C)

–

Industrial (–40°C

≤

95°C;

–40°C

≤

85°C)

–

Automotive (–40°C

≤

, T

≤

105°C)

•

Revision

Note:

Marking

64M4

32M8

16M16

-3

-37E

-5E

None

1. Not all options listed can be combined to

define an offered product. Use the Part

Catalog Search on

www.micron.com

for

product offerings and availability.

Table 1: Key Timing Parameters

Speed Grade

-3

-37E

-5E

Data Rate (MT/s)

CL = 3

400

CL = 4

533

400

CL = 5

667

n/a

(ns)

PDF: 09005aef8117c187

Rev. L 09/08 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

256Mb: x4, x8, x16 DDR2 SDRAM

State Diagram .................................................................................................................................................. 8

Functional Description ..................................................................................................................................... 9

Industrial Temperature ................................................................................................................................ 9

Automotive Temperature ........................................................................................................................... 10

General Notes ............................................................................................................................................ 10

Functional Block Diagrams ............................................................................................................................. 11

Ball Assignments and Descriptions ................................................................................................................. 14

Packaging ...................................................................................................................................................... 19

Package Dimensions .................................................................................................................................. 19

FBGA Package Capacitance ......................................................................................................................... 21

Electrical Specifications – Absolute Ratings ..................................................................................................... 22

Temperature and Thermal Impedance ........................................................................................................ 22

Electrical Specifications – Idd Parameters ........................................................................................................ 25

Idd Specifications and Conditions ............................................................................................................... 25

Idd7 Conditions ......................................................................................................................................... 25

AC Timing Operating Specifications ................................................................................................................ 29

AC and DC Operating Conditions .................................................................................................................... 40

ODT DC Electrical Characteristics ................................................................................................................... 41

Input Electrical Characteristics and Operating Conditions ............................................................................... 42

Output Electrical Characteristics and Operating Conditions ............................................................................. 45

Output Driver Characteristics ......................................................................................................................... 47

Power and Ground Clamp Characteristics ....................................................................................................... 51

AC Overshoot/Undershoot Specification ......................................................................................................... 52

Input Slew Rate Derating ................................................................................................................................ 54

Commands .................................................................................................................................................... 68

Truth Tables ............................................................................................................................................... 68

DESELECT ................................................................................................................................................. 72

NO OPERATION (NOP) .............................................................................................................................. 73

LOAD MODE (LM) ..................................................................................................................................... 73

ACTIVATE .................................................................................................................................................. 73

READ ......................................................................................................................................................... 73

WRITE ....................................................................................................................................................... 73

PRECHARGE .............................................................................................................................................. 74

REFRESH ................................................................................................................................................... 74

SELF REFRESH ........................................................................................................................................... 74

Mode Register (MR) ........................................................................................................................................ 74

Burst Length .............................................................................................................................................. 75

Burst Type ................................................................................................................................................. 75

Operating Mode ......................................................................................................................................... 77

DLL RESET ................................................................................................................................................. 77

Write Recovery ........................................................................................................................................... 78

Power-Down Mode .................................................................................................................................... 78

CAS Latency (CL) ........................................................................................................................................ 79

Extended Mode Register (EMR) ....................................................................................................................... 80

DLL Enable/Disable ................................................................................................................................... 81

Output Drive Strength ................................................................................................................................ 81

DQS# Enable/Disable ................................................................................................................................. 81

RDQS Enable/Disable ................................................................................................................................. 81

Output Enable/Disable ............................................................................................................................... 81

On-Die Termination (ODT) ........................................................................................................................ 82

Contents

PDF: 09005aef8117c187

Rev. L 09/08 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

256Mb: x4, x8, x16 DDR2 SDRAM

Off-Chip Driver (OCD) Impedance Calibration ............................................................................................ 82

Posted CAS Additive Latency (AL) ............................................................................................................... 82

Extended Mode Register 2 (EMR2) .................................................................................................................. 84

Extended Mode Register 3 (EMR3) .................................................................................................................. 85

Initialization .................................................................................................................................................. 86

ACTIVATE ...................................................................................................................................................... 90

READ ............................................................................................................................................................. 92

READ with Precharge ................................................................................................................................. 96

READ with Auto Precharge .......................................................................................................................... 98

WRITE .......................................................................................................................................................... 103

PRECHARGE ................................................................................................................................................. 113

REFRESH ...................................................................................................................................................... 114

SELF REFRESH .............................................................................................................................................. 115

Power-Down Mode ....................................................................................................................................... 117

Precharge Power-Down Clock Frequency Change .......................................................................................... 124

Reset ............................................................................................................................................................. 125

CKE Low Anytime ...................................................................................................................................... 125

ODT Timing .................................................................................................................................................. 127

MRS Command to ODT Update Delay ........................................................................................................ 129

PDF: 09005aef8117c187

Rev. L 09/08 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

256Mb: x4, x8, x16 DDR2 SDRAM

Table 1: Key Timing Parameters ...................................................................................................................... 1

Table 2: Addressing ......................................................................................................................................... 2

Table 3: FBGA 60-Ball – x4, x8 and 84-Ball – x16 Descriptions .......................................................................... 16

Table 4: Input Capacitance ............................................................................................................................ 21

Table 5: Absolute Maximum DC Ratings ........................................................................................................ 22

Table 6: Temperature Limits .......................................................................................................................... 23

Table 7: Thermal Impedance ......................................................................................................................... 24

Table 8: General Idd Parameters .................................................................................................................... 25

Table 9: Idd7 Timing Patterns (4-Bank Interleave READ Operation) ............................................................... 25

Table 10: DDR2 Idd Specifications and Conditions ......................................................................................... 26

Table 11: AC Operating Specifications and Conditions .................................................................................... 29

Table 12: Recommended DC Operating Conditions (SSTL_18) ........................................................................ 40

Table 13: ODT DC Electrical Characteristics ................................................................................................... 41

Table 14: Input DC Logic Levels ..................................................................................................................... 42

Table 15: Input AC Logic Levels ..................................................................................................................... 42

Table 16: Differential Input Logic Levels ........................................................................................................ 43

Table 17: Differential AC Output Parameters .................................................................................................. 45

Table 18: Output DC Current Drive ................................................................................................................ 45

Table 19: Output Characteristics .................................................................................................................... 46

Table 20: Full Strength Pull-Down Current (mA) ............................................................................................ 47

Table 21: Full Strength Pull-Up Current (mA) ................................................................................................. 48

Table 22: Reduced Strength Pull-Down Current (mA) ..................................................................................... 49

Table 23: Reduced Strength Pull-Up Current (mA) .......................................................................................... 50

Table 24: Input Clamp Characteristics ........................................................................................................... 51

Table 25: Address and Control Balls ............................................................................................................... 52

Table 26: Clock, Data, Strobe, and Mask Balls ................................................................................................. 52

Table 27: AC Input Test Conditions ................................................................................................................ 53

Table 28: DDR2-400/533 Setup and Hold Time Derating Values (

IS and

IH) ................................................... 55

Table 29: DDR2-667/800/1066 Setup and Hold Time Derating Values (

IS and

IH) .......................................... 56

Table 30: DDR2-400/533

DS,

DH Derating Values with Differential Strobe ..................................................... 59

Table 31: DDR2-667/800/1066

DS,

DH Derating Values with Differential Strobe ............................................ 61

Table 32: Single-Ended DQS Slew Rate Derating Values Using

and

.................................................. 62

Table 33: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at Vref) at DDR2-667 ...................................... 62

Table 34: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at Vref) at DDR2-533 ...................................... 63

Table 35: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at Vref) at DDR2-400 ...................................... 63

Table 36: Truth Table – DDR2 Commands ..................................................................................................... 68

Table 37: Truth Table – Current State Bank

– Command to Bank

............................................................... 69

Table 38: Truth Table – Current State Bank

– Command to Bank

.............................................................. 71

Table 39: Minimum Delay with Auto Precharge Enabled ................................................................................. 72

Table 40: Burst Definition .............................................................................................................................. 77

Table 41: READ Using Concurrent Auto Precharge ......................................................................................... 98

Table 42: WRITE Using Concurrent Auto Precharge ....................................................................................... 104

Table 43: Truth Table – CKE ......................................................................................................................... 119

List of Tables

PDF: 09005aef8117c187

Rev. L 09/08 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

MT47H32M8BP-37E:B Related Products

	MT47H32M8BP-37E:B	MT47H64M4BP-37E:B	MT47H32M8BP-3:B	MT47H16M16BG-37E:B	MT47H16M16BG-3:B
Description	DDR DRAM, 32MX8, 0.5ns, CMOS, PBGA60, 8 X 12 MM, ROHS COMPLIANT, FBGA-60	DDR DRAM, 64MX4, 0.5ns, CMOS, PBGA60, 8 X 12 MM, ROHS COMPLIANT, FBGA-60	DDR DRAM, 32MX8, 0.45ns, CMOS, PBGA60, 8 X 12 MM, ROHS COMPLIANT, FBGA-60	DDR DRAM, 16MX16, 0.5ns, CMOS, PBGA84, 8 X 14 MM, ROHS COMPLIANT, FBGA-84	DDR DRAM, 16MX16, 0.45ns, CMOS, PBGA84, 8 X 14 MM, ROHS COMPLIANT, FBGA-84
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to
Parts packaging code	BGA	BGA	BGA	BGA	BGA
package instruction	TFBGA, BGA60,9X11,32	TFBGA, BGA60,9X11,32	TFBGA, BGA60,9X11,32	TFBGA, BGA84,9X15,32	TFBGA, BGA84,9X15,32
Contacts	60	60	60	84	84
Reach Compliance Code	not_compliant	unknown	unknown	not_compliant	not_compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
Maximum access time	0.5 ns	0.5 ns	0.45 ns	0.5 ns	0.45 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	266 MHz	266 MHz	333 MHz	266 MHz	333 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON
interleaved burst length	4,8	4,8	4,8	4,8	4,8
JESD-30 code	R-PBGA-B60	R-PBGA-B60	R-PBGA-B60	R-PBGA-B84	R-PBGA-B84
JESD-609 code	e1	e1	e1	e1	e1
length	12 mm	12 mm	12 mm	14 mm	14 mm
memory density	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit
Memory IC Type	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM
memory width	8	4	8	16	16
Number of functions	1	1	1	1	1
Number of ports	1	1	1	1	1
Number of terminals	60	60	60	84	84
word count	33554432 words	67108864 words	33554432 words	16777216 words	16777216 words
character code	32000000	64000000	32000000	16000000	16000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C
organize	32MX8	64MX4	32MX8	16MX16	16MX16
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA
Encapsulate equivalent code	BGA60,9X11,32	BGA60,9X11,32	BGA60,9X11,32	BGA84,9X15,32	BGA84,9X15,32
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260	260
power supply	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	8192	8192	8192	8192	8192
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm
self refresh	YES	YES	YES	YES	YES
Continuous burst length	4,8	4,8	4,8	4,8	4,8
Maximum standby current	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A
Maximum slew rate	0.24 mA	0.24 mA	0.26 mA	0.17 mA	0.18 mA
Maximum supply voltage (Vsup)	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V
Minimum supply voltage (Vsup)	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	OTHER	OTHER	OTHER	OTHER	OTHER
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL	BALL	BALL	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	30	30	30	30	30
width	8 mm	8 mm	8 mm	8 mm	8 mm
Maker	Micron Technology	-	-	Micron Technology	Micron Technology

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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