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CAT25C17GY-1.8TE13

Description
EEPROM, 2KX8, Serial, CMOS, PDSO8, ROHS COMPLIANT, TSSOP-8
Categorystorage    storage   
File Size305KB,12 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Environmental Compliance  
Download Datasheet Parametric View All

CAT25C17GY-1.8TE13 Overview

EEPROM, 2KX8, Serial, CMOS, PDSO8, ROHS COMPLIANT, TSSOP-8

CAT25C17GY-1.8TE13 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerCatalyst
Parts packaging codeSOIC
package instructionTSSOP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum clock frequency (fCLK)1 MHz
JESD-30 codeR-PDSO-G8
JESD-609 codee4
length4.4 mm
memory density16384 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count2048 words
character code2000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize2KX8
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.2 mm
Serial bus typeSPI
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)1.8 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width3 mm
Maximum write cycle time (tWC)10 ms
CAT25C11/03/05/09/17
1K/2K/4K/8K/16K SPI Serial CMOS EEPROM
FEATURES
s
10 MHz SPI compatible
s
1.8 to 6.0 volt operation
s
Hardware and software protection
s
Low power CMOS technology
s
SPI modes (0,0 & 1,1)*
s
Commercial, industrial, automotive and extended
s
1,000,000 program/erase cycles
s
100 year data retention
s
Self-timed write cycle
s
8-pin DIP/SOIC, 8-pin TSSOP and 8-pin MSOP
s
16/32-byte page write buffer
s
Write protection
temperature ranges
– Protect first page, last page, any 1/4 array or
lower 1/2 array
DESCRIPTION
The CAT25C11/03/05/09/17 is a 1K/2K/4K/8K/16K-Bit
SPI Serial CMOS EEPROM internally organized as
128x8/256x8/512x8/1024x8/2048x8 bits. Catalyst’s
advanced CMOS Technology substantially reduces
device power requirements. The CAT25C11/03/05
features a 16-byte page write buffer. The 25C09/17
features a 32-byte page write buffer.The device operates
via the SPI bus serial interface and is enabled though a
Chip Select (CS). In addition to the Chip Select, the clock
PIN CONFIGURATION
CS
SO
WP
VSS
MSOP Package (R, Z, GZ)* SOIC Package (S, V, GV)
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
*CAT25C11/03 only
PIN FUNCTIONS
Pin Name
SO
SCK
WP
V
CC
V
SS
CS
SI
i
D
c
s
Ground
Function
Serial Data Output
u
n
i
t
n
o
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
input (SCK), data in (SI) and data out (SO) are required
to access the device. The
HOLD
pin may be used to
suspend any serial communication without resetting the
serial sequence. The CAT25C11/03/05/09/17 is designed
with software and hardware write protection features
including Block Write protection. The device is available
in 8-pin DIP, 8-pin SOIC, 8/14-pin TSSOP and 8-pin
MSOP packages.
d
e
8
7
6
5
VCC
HOLD
SCK
SI
a
P
CS
SO
WP
VSS
1
2
3
4
s
t
r
8
7
6
5
VCC
HOLD
SCK
SI
DIP Package (P, L, GL)
CS
SO
WP
VSS
1
2
3
4
TSSOP Package (U, Y, GY)
BLOCK DIAGRAM
SENSE AMPS
SHIFT REGISTERS
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
Serial Clock
Write Protect
+1.8V to +6.0V Power Supply
SO
SI
CS
WP
HOLD
SCK
I/O
CONTROL
SPI
CONTROL
LOGIC
BLOCK
PROTECT
LOGIC
CONTROL LOGIC
XDEC
EEPROM
ARRAY
Chip Select
Serial Data Input
Suspends Serial Input
No Connect
HOLD
NC
DATA IN
STORAGE
HIGH VOLTAGE/
TIMING CONTROL
* Other SPI modes available on request.
STATUS
REGISTER
Doc. No. 1017, Rev. L
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
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