INTEGRATED CIRCUITS
74ABT651
Octal transceiver/register, inverting
(3-State)
Product data
Supersedes data of 1995 Sep 06
2002 Dec 17
Philips
Semiconductors
Philips Semiconductors
Product data
Octal transceiver/register, inverting (3-State)
74ABT651
FEATURES
•
Independent registers for A and B buses
•
The 74ABT651 is the inverting version of the 74ABT652
•
Multiplexed real-time and stored data
•
3-State outputs
•
Live insertion/extraction permitted.
•
Power-up 3-State
•
Power-up reset
•
Output capability: +64 mA / –32 mA
•
Latch-up protection exceeds 500 mA per Jedec Std 17
•
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT651 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT651 transceiver/register consists of bus transceiver
circuits with 3-State outputs, D-type flip-flops, and control circuitry
arranged for multiplexed transmission of data directly from the input
bus or the internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes HIGH. Output
Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for
bus management.
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74ABT651.
The select pins determine whether data is stored or transferred
through the device in real time.
The output enable pins determine the direction of the data flow.
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
I/O
I
CCZ
PARAMETER
Propagation delay
CPBA to An or CPAB to Bn
Input capacitance
I/O capacitance
Total supply current
CONDITIONS
T
amb
= 25
°C;
GND = 0 V
C
L
= 50 pF; V
CC
= 5 V
V
I
= 0 V or V
CC
Outputs disabled; V
O
= 0 V or V
CC
Outputs disabled; V
CC
= 5.5 V
TYPICAL
3.8
4.4
4
7
110
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40
°C
to +85
°C
–40
°C
to +85
°C
–40
°C
to +85
°C
PART NUMBER
74ABT651N
74ABT651D
74ABT651PW
DWG NUMBER
SOT222-1
SOT137-1
SOT355-1
PIN CONFIGURATION
CPAB
SAB
OEAB
A0
A1
A2
A3
A4
A5
A6
A7
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
CPBA
SBA
OEBA
B0
B1
B2
B3
B4
B5
B6
B7
PIN DESCRIPTION
PIN
NUMBER
1, 23
2, 22
3, 21
4, 5, 6, 7, 8,
9, 10, 11
20, 19, 18,
17, 16, 15,
14, 13
12
24
SYMBOL
CPAB /
CPBA
SAB /
SBA
OEAB /
OEBA
A0 – A7
B0 – B7
GND
V
CC
FUNCTION
A to B clock input /
B to A clock input
A to B select input /
B to A select input
A to B Output Enable input /
B to A Output Enable input
(active–LOW)
Data inputs/outputs (A side)
Data inputs/outputs (B side)
Ground (0 V)
Positive supply voltage
SA00094
2002 Dec 17
2
Philips Semiconductors
Product data
Octal transceiver/register, inverting (3-State)
74ABT651
LOGIC SYMBOL (IEEE/IEC)
LOGIC SYMBOL
21
3
23
22
1
2
EN1 [BA]
EN2 [AB]
C4
G5
C6
G7
23
22
4
5
6
7
8
9
10
11
A0
A1
A2
A3
A4
A5
A6
A7
CPBA
SBA
SAB
CPAB
OEAB
OEBA
3
21
4
w1
1
6D 7
1
7
5
5 1
4D
20
2
1
w1
2
19
18
B0
B1
B2
B3
B4
B5
B6
B7
5
6
7
8
9
10
11
20
19
18
17
16
15
14
13
SA00095
17
16
15
14
13
SA00125
REAL TIME BUS TRANSFER
BUS B TO BUS A
REAL TIME BUS TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A OR B
A
B
A
B
A
B
A
B
OEABOEBA CPAB CPBA SAB SBA
L
L
X
X
X
L
}
H
H
OEABOEBA CPAB CPBA SAB SBA
X
X
L
X
}
X
L
L
H
X
H
OEABOEBA CPAB CPBA SAB SBA
↑
X
↑
X
↑
↑
X
X
X
X
X
X
}
H
L
OEABOEBA CPAB CPBA SAB SBA
H|L H|L
H
H
}
SA00097
2002 Dec 17
3
Philips Semiconductors
Product data
Octal transceiver/register, inverting (3-State)
74ABT651
FUNCTION TABLE
INPUTS
OEAB
L
L
X
H
L
L
L
L
H
H
H
H
L
X
↑
*
**
=
=
=
=
OEBA
H
H
H
H
X
L
L
L
H
H
L
CPAB
H or L
↑
↑
↑
H or L
↑
X
X
X
H or L
H or L
CPBA
H or L
↑
H or L
↑
↑
↑
X
H or L
X
X
H or L
SAB
X
X
X
**
X
X
X
X
L
H
H
SBA
X
X
X
X
X
**
L
H
X
X
H
An
Input
Input
Unspecified
output*
Output
Input
Output
DATA I/O
Bn
Input
Unspecified
output*
Input
Input
Output
Output
OPERATING MODE
Isolation
Store A and B data
Store A, Hold B
Store A in both registers
Hold A, Store B
Store B in both registers
Real time B data to A bus
Stored B data to A bus
Real time A data to B bus
Store A data to B bus
Stored A data to B bus
Stored B data to A bus
HIGH voltage level
LOW voltage level
Don’t care
LOW-to-HIGH clock transition
The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the clock.
If both Select controls (SAB and SBA) are LOW, then clocks can occur simultaneously. If either Select control is HIGH, the clocks must
be staggered in order to load both registers.
LOGIC DIAGRAM
21
OEBA
3
OEAB
23
CPBA
22
SBA
1
CPAB
2
SAB
1of 8 Channels
1D
C1
Q
A0
4
1D
C1
Q
20
B0
A1
A2
A3
A4
A5
A6
A7
5
6
7
8
9
10
11
DETAIL A X 7
19
18
17
16
15
14
13
B1
B2
B3
B4
B5
B6
B7
SA00098
2002 Dec 17
4
Philips Semiconductors
Product data
Octal transceiver/register, inverting (3-State)
74ABT651
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Storage temperature range
V
O
< 0 V
output in Off or HIGH state
output in LOW state
V
I
< 0 V
CONDITIONS
RATING
–0.5 to +7.0
–18
–1.2 to +7.0
–50
–0.5 to +5.5
128
–65 to 150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
HIGH-level input voltage
LOW-level Input voltage
HIGH-level output current
LOW-level output current
Input transition rise or fall rate
Operating free-air temperature range
0
–40
PARAMETER
Min
4.5
0
2.0
0.8
–32
64
10
+85
Max
5.5
V
CC
V
V
V
V
mA
mA
ns/V
°C
UNIT
2002 Dec 17
5
Embedded System
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