CAT24AC128U14I-1.8TE13REV-A datasheet, PDF

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CAT24AC128U14I-1.8TE13REV-A: Description16KX8 I2C/2-WIRE SERIAL EEPROM, PDSO14, TSSOP-14; Categorystorage storage; File Size473KB，11 Pages; ManufacturerCatalyst; Websitehttp://www.catalyst-semiconductor.com/

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CAT24AC128U14I-1.8TE13REV-A Overview

16KX8 I2C/2-WIRE SERIAL EEPROM, PDSO14, TSSOP-14

CAT24AC128U14I-1.8TE13REV-A Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Catalyst
Parts packaging code	TSSOP
package instruction	TSSOP,
Contacts	14
Reach Compliance Code	unknown
Maximum clock frequency (fCLK)	0.1 MHz
JESD-30 code	R-PDSO-G14
JESD-609 code	e0
length	5 mm
memory density	131072 bit
Memory IC Type	EEPROM
memory width	8
Number of functions	1
Number of terminals	14
word count	16384 words
character code	16000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	16KX8
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Parallel/Serial	SERIAL
Peak Reflow Temperature (Celsius)	240
Certification status	Not Qualified
Maximum seat height	1.1 mm
Serial bus type	I2C
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.8 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	4.4 mm
Maximum write cycle time (tWC)	5 ms

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CAT24AC128

128kbit I

C Serial CMOS EEPROM With Three Chip Address Input Pins

FEATURES

400kHz (2.5V) and 100kHz (1.8V) I

C bus

Commercial, industrial and extended

GEN

ALO

compatibility

1.8 to 5.5 volt operation

Low power CMOS technology

Schmitt trigger filtered inputs for noise

automotive temperature ranges

Write protect feature

– Entire array protected when WP at V

1,000,000 program/erase cycles

100 year data retention

8-Pin DIP, 8-Pin SOIC (JEDEC/EIAJ) or

suppression

64-Byte page write buffer

Self-timed write cycle with auto-clear

14-pin TSSOP

DESCRIPTION

The CAT24AC128 is a 128kbit Serial CMOS EEPROM

internally organized as 16,384 words of 8 bits each.

Catalyst’s advanced CMOS technology substantially

reduces device power requirements. The CAT24AC128

features a 64-byte page write buffer. The device operates

via the I

C bus serial interface and is available in 8-pin

DIP, 8-pin SOIC or 14-pin TSSOP packages. Three

device address inputs allows up to 8 devices to share a

common 2-wire I

C bus.

PIN CONFIGURATION

DIP Package (P, L)

VSS

VCC

SCL

SDA

BLOCK DIAGRAM

EXTERNAL LOAD

SOIC Package (J, K, W, X)

VSS

VCC

SCL

SDA

VCC

VSS

WORD ADDRESS

BUFFERS

COLUMN

DECODERS

512

SDA

START/STOP

LOGIC

DOUT

ACK

SENSE AMPS

SHIFT REGISTERS

TSSOP Package (U14, Y14)

VSS

V CC

SCL

SDA

XDEC

CONTROL

LOGIC

256

PROM

256X512

PIN FUNCTIONS

Pin Name

SDA

SCL

A0 - A2

Function

Serial Data/Address

Serial Clock

Write Protect

+1.8V to +5.5V Power Supply

Ground

Device Address Inputs

SCL

STATE COUNTERS

SLAVE

ADDRESS

COMPARATORS

HIGH VOLTAGE/

TIMING CONTROL

DATA IN STORAGE

* Catalyst Semiconductor is licensed by Philips Corporation to carry the I

C Bus Protocol.

Characteristics subject to change without notice

Doc. No. 1028, Rev. J

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