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CAT93C56KI-REV-E

Description
EEPROM, 128KX16, Serial, CMOS, PDSO8, SOIC-8
Categorystorage    storage   
File Size407KB,9 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Download Datasheet Parametric View All

CAT93C56KI-REV-E Overview

EEPROM, 128KX16, Serial, CMOS, PDSO8, SOIC-8

CAT93C56KI-REV-E Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCatalyst
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codeunknown
ECCN code3A991.B.1.B.1
Spare memory width8
Maximum clock frequency (fCLK)0.5 MHz
JESD-30 codeR-PDSO-G8
JESD-609 codee0
length5.3 mm
memory density2097152 bit
Memory IC TypeEEPROM
memory width16
Number of functions1
Number of terminals8
word count131072 words
character code128000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX16
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)240
Certification statusNot Qualified
Maximum seat height2.03 mm
Serial bus typeMICROWIRE
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2.5 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width5.25 mm
CAT93C56/57
(Die Rev. E)
2K-Bit Microwire Serial EEPROM
FEATURES
I
High speed operation: 1MHz
I
Low power CMOS technology
I
1.8 to 6.0 volt operation
I
Selectable x8 or x16 memory organization
I
Self-timed write cycle with auto-clear
I
Hardware and software write protection
H
GEN
FR
ALO
EE
LE
A
D
F
R
E
E
TM
I
Power-up inadvertant write protection
I
1,000,000 Program/erase cycles
I
100 year data retention
I
Commercial, industrial and automotive
temperature ranges
I
Sequential read
I
“Green” package option available
DESCRIPTION
The CAT93C56/57 are 2K-bit Serial EEPROM memory
devices which are configured as either registers of 16
bits (ORG pin at V
CC
) or 8 bits (ORG pin at GND). Each
register can be written (or read) serially by using the
DI (or DO) pin. The CAT93C56/57 are manufactured
using Catalyst’s advanced CMOS EEPROM floating
gate technology. The devices are designed to endure
1,000,000 program/erase cycles and has a data reten-
tion of 100 years. The devices are available in 8-pin DIP,
SOIC, TSSOP and 8-pad TDFN packages.
PIN CONFIGURATION
DIP Package (P, L)
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
NC
ORG
GND
FUNCTIONAL SYMBOL
SOIC Package (J,W)
NC
VCC
CS
SK
1
2
3
4
8
7
6
5
ORG
GND
DO
DI
V
CC
ORG
CS
SK
NC
DI
DO
SOIC Package (S,V)
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
NC
ORG
GND
SOIC Package (K,X)
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
NC
ORG
GND
GND
PIN FUNCTIONS
Pin Name
CS
SK
Function
Chip Select
Clock Input
Serial Data Input
Serial Data Output
+1.8 to 6.0V Power Supply
Ground
Memory Organization
No Connection
TSSOP Package (U,Y)
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
NC
ORG
GND
DI
DO
V
CC
GND
TDFN Package (RD4, ZD4)
VCC
8
NC
7
ORG
6
GND
5
1
CS
2
SK
3
DI
4
DO
ORG
NC
Bottom View
Note: When the ORG pin is connected to VCC, the x16 organiza-
tion is selected. When it is connected to ground, the x8 pin is
selected. If the ORG pin is left unconnected, then an internal pullup
device will select the x16 organization.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice.
Doc. No. 1088, Rev. N
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