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MK3727SLFTR

Description
Clock Generator, 27MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size137KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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MK3727SLFTR Overview

Clock Generator, 27MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8

MK3727SLFTR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeSOIC
package instruction0.150 INCH, ROHS COMPLIANT, SOIC-8
Contacts8
Reach Compliance Codecompliant
ECCN codeEAR99
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.9 mm
Humidity sensitivity level1
Number of terminals8
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency27 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Master clock/crystal nominal frequency18 MHz
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage3.45 V
Minimum supply voltage3.15 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.9 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
MK3727
L
OW
C
OST
24
TO
36 MH
Z
3.3 V
OLT
VCXO
Description
The MK3727 series of devices include the original
MK3727S, and the new MK3727C and MK3727D. The
MK3727D and MK3727C are drop-in replacements for
the MK3727S device. Compared to these earlier
devices, the MK3727D and MK3727C offer a wider
operating frequency range and improved power supply
noise rejection. The MK3727D is recommended for
new designs.
The MK3727 series combines the functions of a VCXO
(Voltage Controlled Crystal Oscillator) and PLL (Phase
Locked Loop) frequency doubler onto a single chip.
Used in conjunction with an external pullable quartz
crystal, this monolithic integrated circuit replaces more
costly hybrid (canned) VCXO devices. The MK3727 is
designed primarily for data and clock recovery
applications within end products such as ADSL
modems, set-top box receivers, and telecom systems.
The MK3727D is recommended for new designs. The
MK3727D exhibits a moderate VCXO gain of
120ppm/V typical, when used with a high quality
external pullable quartz crystal. The MK3727C offers a
higher VCXO gain of 150ppm/V. The higher intrinsic
VCXO gain of the MK3727C may help compensate for
the reduced pullability of a low quality crystal used in
some applications. However, higher VCXO gain may
also increase clock output phase noise.
The frequency of the on-chip VCXO is adjusted by an
external control voltage input into pin VIN. Because
VIN is a high impedance input, it can be driven directly
from an PWM RC integrator circuit. Frequency output
increases with VIN voltage input. The usable range of
VIN is 0 to 3 V.
Features
MK3727D and MK3727C are drop-in upgrades to the
earlier MK3727S device
MK3727D and MK3727C offer 24 to 36 MHz output
frequency range (output frequency = 2x crystal
frequency) and improved power supply noise
rejection
Uses an inexpensive 12 to 18 MHz external crystal
Ideal for ADSL applications using 17.664 MHz
external pullable crystal to generate locked 35.328
MHz clock physical layer clock
Ideal for set-top box applications using 13.5 MHz
external pullable crystal to generate lock 27 MHz
clock transport video clock
On-chip VCXO with guaranteed pull range of ±115
ppm minimum (MK3727D)
VCXO input tuning voltage 0 to 3.3 V
Packaged in 8-pin SOIC (150 mil wide)
Available in Pb-free packaging
MK3727D is recommended for new designs.
Block Diagram
V IN
12 to 1 8 M H z
P ullab le
C rystal
X1
X2
V o lta g e
C o n tro lled
C ry sta l
O s cilla to r
PLL
F re q u e n c y
D o u b ler
24 to 36 M H z
(2x C rystal F re q ue ncy)
MDS 3727 L
I nt egra te d Ci r cu it S y s te ms
1
5 25 Race Street, San Jose, CA 95 126
te l (40 8) 29 7-120 1
Revision 091205
w w w. i c st . c o m

MK3727SLFTR Related Products

MK3727SLFTR MK3727SLF MK3727CLFTR MK3727CLF
Description Clock Generator, 27MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8 Clock Generator, 27MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8 Clock Generator, 36MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8 Clock Generator, 36MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8
Is it lead-free? Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code SOIC SOIC SOIC SOIC
package instruction 0.150 INCH, ROHS COMPLIANT, SOIC-8 0.150 INCH, ROHS COMPLIANT, SOIC-8 0.150 INCH, ROHS COMPLIANT, SOIC-8 0.150 INCH, ROHS COMPLIANT, SOIC-8
Contacts 8 8 8 8
Reach Compliance Code compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99
JESD-30 code R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 R-PDSO-G8
JESD-609 code e3 e3 e3 e3
length 4.9 mm 4.9 mm 4.9 mm 4.9 mm
Number of terminals 8 8 8 8
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C
Maximum output clock frequency 27 MHz 27 MHz 36 MHz 36 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP SOP SOP
Encapsulate equivalent code SOP8,.25 SOP8,.25 SOP8,.25 SOP8,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 260 260 260
power supply 3.3 V 3.3 V 3.3 V 3.3 V
Master clock/crystal nominal frequency 18 MHz 18 MHz 18 MHz 18 MHz
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.75 mm 1.75 mm 1.75 mm 1.75 mm
Maximum supply voltage 3.45 V 3.45 V 3.45 V 3.45 V
Minimum supply voltage 3.15 V 3.15 V 3.15 V 3.15 V
Nominal supply voltage 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed MATTE TIN MATTE TIN
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 NOT SPECIFIED NOT SPECIFIED
width 3.9 mm 3.9 mm 3.9 mm 3.9 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
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