DSM2180F3-15T6 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > storage> storage> DSM2180F3-15T6

DSM2180F3-15T6: DescriptionDSM (Digital Signal Processor System Memory) for analog devices ADSP-218X family (5 V supply); Categorystorage storage; File Size805KB，63 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

Download Datasheet Parametric Compare View All

DSM2180F3-15T6 Overview

DSM (Digital Signal Processor System Memory) for analog devices ADSP-218X family (5 V supply)

DSM2180F3-15T6 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	QFP
package instruction	PLASTIC, QFP-52
Contacts	52
Reach Compliance Code	compli
JESD-30 code	S-PQFP-G52
JESD-609 code	e4
length	10 mm
memory density	1048576 bi
Memory IC Type	MEMORY CIRCUIT
memory width	8
Number of functions	1
Number of terminals	52
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	128KX8
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Package shape	SQUARE
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	2.35 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10 mm

Preview

Download Datasheet

View All

DSM2180F3

DSM (Digital Signal Processor System Memory)

For Analog Devices ADSP-218X Family (5V Supply)

FEATURES SUMMARY

Glueless Connection to DSP

– Easily add memory, logic, and I/O to DSP

Figure 1. Packages

128K Byte Flash Memory

– For Bootloading and/or Data Overlay Memory

– Programmable Decoding and Paging Logic

allows accessing Flash memory as Byte DMA

(BDMA) and as External Data Overlay mem-

ory

– Rapidly access Flash memory with BDMA for

booting and loading internal DSP Overlay

memory. Alternatively access the same Flash

memory as External Data Overlay memory to

efficiently write Flash memory with code up-

dates and data, a byte at a time with no DMA

setup overhead

– Individual 16K Byte Flash memory sectors

match size of DSP External Data Overlay

window for efficient data management. Inte-

grated page logic provides easy DSP access

to all 128K Bytes.

– DSM connects to lower byte of 16-bit DSP

data bus. Byte-wide accesses to 8-bit BDMA

space. Half-word accesses to 16-bit Data

Memory Overlay and 16-bit I/O Mem space.

PQFP52 (T)

PLCC52 (K)

In-System Programming (ISP) with JTAG

– Program entire chip in 10-20 seconds with no

involvement of the DSP

– Eliminate sockets for pre-programmed mem-

ory and logic devices

– Efficient manufacturing allows easy product

testing and Just-In-Time inventory

– Use low-cost FlashLINK

cable with PC

5V Devices (±10%)

Up to 16 Multifunction I/O Pins

– Increase total DSP system I/O capability

– I/O controlled by DSP software or PLD logic

– 8mA I/O pin drive at 5 Vcc

Content Security

– Programmable Security Bit blocks access of

device programmers and readers

General purpose PLD

– Over 3,000 Gates of PLD with 16 macro cells

– Use for peripheral glue logic to keypads, con-

trol panel, displays, LCD, UART devices, etc.

– Eliminate PLDs and external logic devices

– Create state machines, chip selects, simple

shifters and counters, clock dividers, delays

– Simple PSDsoft Express

software ...Free

Zero-Power Technology

– 75

µA

standby at V

=5V

Small Packaging

– 52-pin PQFP or 52-pin PLCC

Memory Speed

– 90 ns

1/63

December 2001

DSM2180F3

TABLE OF CONTENTS

Summary Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

DSP Address/Data/Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Programmable Logic (PLDs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Runtime Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Memory Page Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

I/O Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

JTAG ISP Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Security and NVM Sector Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Typical connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Specifying Mem Map with PSDsoft ExpressTM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Runtime control register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Detailed Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Instruction Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Reading Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Programming Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Erasing Flash Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Flash Memory Sector Protect. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

DSM Security Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Reset Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Page Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

PLDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Decode PLD (DPLD). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Complex PLD (CPLD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2/63

DSM2180F3

DSP Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

I/O Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Port Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Port B – Functionality and Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Port C – Functionality and Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Port D – Functionality and Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

PLD Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

PSD Chip Select Input (CSI, PD2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Power On Reset, Warm Reset, Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Programming In-Circuit using JTAG ISP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1

AC/DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Table:

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

CPLD Combinatorial Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

CPLD Macrocell Synchronous Clock Mode Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

CPLD Macrocell Asynchronous Clock Mode Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Input Macrocell Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Read Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Write Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Flash Memory Program, Write and Erase Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Reset (Reset) Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

ISC Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Table:

PLCC52 - 52 lead Plastic Leaded Chip Carrier, rectangular . . . . . . . . . . . . . . . . . . . . . . . . 57

Assignments – PLCC52 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

PQFP52 - 52 lead Plastic Quad Flatpack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Pin Assignments – PQFP52 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

3/63

DSM2180F3-15T6 Related Products

	DSM2180F3-15T6	DSM2180F3	DSM2180F3-15K6	DSM2180F3V-90K6	DSM2180F3V-90T6	DSM2180F3_08
Description	DSM (Digital Signal Processor System Memory) for analog devices ADSP-218X family (5 V supply)	DSM (Digital Signal Processor System Memory) for analog devices ADSP-218X family (5 V supply)	DSM (Digital Signal Processor System Memory) for analog devices ADSP-218X family (5 V supply)	DSM (Digital Signal Processor System Memory) for analog devices ADSP-218X family (5 V supply)	DSM (Digital Signal Processor System Memory) for analog devices ADSP-218X family (5 V supply)	DSM (Digital Signal Processor System Memory) for analog devices ADSP-218X family (5 V supply)
Is it Rohs certified?	conform to	-	conform to	conform to	conform to	-
Maker	STMicroelectronics	-	STMicroelectronics	STMicroelectronics	STMicroelectronics	-
Parts packaging code	QFP	-	LCC	LCC	QFP	-
package instruction	PLASTIC, QFP-52	-	PLASTIC, LCC-52	PLASTIC, LCC-52	PLASTIC, QFP-52	-
Contacts	52	-	52	52	52	-
Reach Compliance Code	compli	-	compli	compli	compli	-
JESD-30 code	S-PQFP-G52	-	S-PQCC-J52	S-PQCC-J52	S-PQFP-G52	-
JESD-609 code	e4	-	e3	e3	e4	-
length	10 mm	-	19.1262 mm	19.1262 mm	10 mm	-
memory density	1048576 bi	-	1048576 bi	1048576 bi	1048576 bi	-
Memory IC Type	MEMORY CIRCUIT	-	MEMORY CIRCUIT	MEMORY CIRCUIT	MEMORY CIRCUIT	-
memory width	8	-	8	8	8	-
Number of functions	1	-	1	1	1	-
Number of terminals	52	-	52	52	52	-
word count	131072 words	-	131072 words	131072 words	131072 words	-
character code	128000	-	128000	128000	128000	-
Operating mode	ASYNCHRONOUS	-	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	-
Maximum operating temperature	85 °C	-	85 °C	85 °C	85 °C	-
Minimum operating temperature	-40 °C	-	-40 °C	-40 °C	-40 °C	-
organize	128KX8	-	128KX8	128KX8	128KX8	-
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-
encapsulated code	QFP	-	QCCJ	QCCJ	QFP	-
Package shape	SQUARE	-	SQUARE	SQUARE	SQUARE	-
Package form	FLATPACK	-	CHIP CARRIER	CHIP CARRIER	FLATPACK	-
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-
Certification status	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	-
Maximum seat height	2.35 mm	-	4.57 mm	4.57 mm	2.35 mm	-
Maximum supply voltage (Vsup)	5.5 V	-	5.5 V	3.6 V	3.6 V	-
Minimum supply voltage (Vsup)	4.5 V	-	4.5 V	3 V	3 V	-
Nominal supply voltage (Vsup)	5 V	-	5 V	3.3 V	3.3 V	-
surface mount	YES	-	YES	YES	YES	-
technology	CMOS	-	CMOS	CMOS	CMOS	-
Temperature level	INDUSTRIAL	-	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	-
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	-	Matte Tin (Sn)	Matte Tin (Sn)	Nickel/Palladium/Gold (Ni/Pd/Au)	-
Terminal form	GULL WING	-	J BEND	J BEND	GULL WING	-
Terminal pitch	0.65 mm	-	1.27 mm	1.27 mm	0.65 mm	-
Terminal location	QUAD	-	QUAD	QUAD	QUAD	-
Maximum time at peak reflow temperature	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-
width	10 mm	-	19.1262 mm	19.1262 mm	10 mm	-

Recommended Resources

Pyroelectric automatic door control circuit

Infrared remote control light switch circuit (1)

Series switching power supply circuit composed of CW3524 01

35W audio amplifier circuit

Key to dial conversion circuit

4-bit addition circuit using half adder and full adder

Some summary about IAR -- Flash Loader principle: Let's talk about the Flash Loader applet first. IAR debugger C-SPY uses it by default to complete tasks such as data transmission, Flash erasing and burning. Of course, the premise is to select "Use F...; 火辣西米秀 Microcontroller MCU

How to deal with the unused input/output terminals of the LM358 voltage comparator.: I am designing an AC power supply: I use LM358 to control it. Now I only use half of the LM358. How do I deal with the unused input/output terminals of the voltage comparator? Thanks Li Bin...; tchdlb Power technology

The future of LED professional and general lighting: Speech title: The future of professional and general lighting of LEDSpeaker: Su Zunhui, technicaldirector and professor-level senior engineer of Shenzhen Diguang Electronics Co., Ltd.Main content:LED—...; LED123 Power technology

Why does an error occur after changing the unit of the PCB using allergo?: Why after using allergo to change the unit of the PCB, for example, changing mil to inch, the database check will report an error?...; 在路上 PCB Design

Keil for arm problem: realview 3.2Hello.c: Warning: C3910W: Old syntax, please use '--via'. Hello.c: error: C3900U: Unrecognized option '-pu'. Hello.c: Warning: C3910W: Old syntax, please use '--apcs'.怎么解决谢谢...; duttway ARM Technology

EEWORLD Download Center's Greatest Contribution (II) The Way of Programmer Cultivation - From Small Worker to Expert: [align=center][size=5][color=#ff0000][b]EEWORLD Download Center Dedicated (II) The Way of Programmer Cultivation [/font][font=Times New Roman]--[/font][font=宋体]From Small Worker to Expert [/font][/b][...; tiankai001 Download Centre

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components