DS1689SN/R datasheet, PDF - EEWORLD Datasheet

DS1689/DS1693

3V/5V Serialized Real-Time Clocks

with NV RAM Control

www.maxim-ic.com

FEATURES

Incorporates Industry Standard DS1287 PC

Clock Plus Enhanced Features:

+3V or +5V Operation

64-Bit Silicon Serial Number

64-Bit Customer Specific ROM or

Additional Serial Number Available

Power Control Circuitry Supports System

Power-On from Date/Time Alarm or Key

Closure

Automatic Battery Backup and Write

Protection to External SRAM

Crystal Select Bit Allows RTC to Operate

with 6pF or 12.5pF Crystal

114 Bytes User NV RAM

Auxiliary Battery Input

RAM Clear Input

Century Register

32kHz Output for Power Management

32-Bit V

CC

Powered Elapsed Time Counter

32-Bit V

BAT

Powered Elapsed Time Counter

16-Bit Power Cycle Counter

Compatible with Existing BIOS for Original

DS1287 Functions

Available as IC (DS1689) or Stand-Alone

Module with Embedded Battery and Crystal

(DS1693)

Available in Industrial Temperature

Version

Timekeeping Algorithm Includes Leap Year

Compensation Valid Up to 2100

PIN CONFIGURATIONS

V

BAUX

N.C.

RCLR

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

PWR

GND

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

CEI

CEO

V

CCI

V

CCO

SQW

N.C.

IRQ

PSEL

RD

N.C.

WR

ALE

CS

KS

V

BAUX

X1

X2

RCLR

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

PWR

GND

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

CEI

CEO

V

CCI

V

CCO

SQW

V

BAT

IRQ

PSEL

RD

GND

WR

ALE

CS

KS

DS1693

Encapsulated DIP

(740 Mils)

SO

(330 Mils)

ORDERING INFORMATION

PART

DS1689S

DS1689S+

DS1689SN

DS1689SN+

DS1689S/T&R

DS1689S+T&R

DS1689SN/T&R

DS1689SN+T&R

DS1693

TEMP RANGE

0°C to +70°C

-40°C to +85°C

0°C to +70°C

-40°C to +85°C

0°C to +70°C

VOLTAGE (V)

3 to 5

PIN-PACKAGE

28 SO (0.330″)

28 SO (0.330″)/Tape & Reel

28 EDIP (0.740″)

TOP MARK*

DS1689S

DS1693

+

Denotes a lead-free/RoHS-compliant device.

*

A “+” anywhere on the top mark denotes a lead-free/RoHS-compliant device. An “N” denotes an industrial temperature device.

1 of 36

DS1689

REV: 112105

DS1689/DS1693

PIN DESCRIPTION

SO

EDIP

NAME

FUNCTION

Auxiliary Battery Supply. Auxiliary battery input required for

kickstart and wake-up features. This input also supports

clock/calendar and External NV RAM if V

BAT

is at lower voltage or

is not present. A standard +3V lithium cell or other energy source

can be used. Battery voltage must be held between +2.5V and +3.7V

for proper operation. If V

BAUX

is not going to be used it should be

grounded and auxiliary battery enable bit bank 1, register 4BH,

should = 0.

Connections for Standard 32.768kHz Quartz Crystal. For greatest

accuracy, the DS1689 must be used with a crystal that has a

specified load capacitance of either 6pF or 12.5pF. The crystal select

(CS) bit in Extended Control Register 4B is used to select operation

with a 6pF or 12.5pF crystal. The crystal is attached directly to the

X1 and X2 pins. There is no need for external capacitors or resistors.

Note: X1 and X2 are very high-impedance nodes. It is recommended

that they and the crystal by guard-ringed with ground and that high-

frequency signals be kept away from the crystal area.

For more information on crystal selection and crystal layout

considerations, refer to

Application Note 58: Crystal Considerations

with Dallas Real Time Clocks.

The DS1689 can also be driven by an

external 32.768kHz oscillator. In this configuration, the X1 pin is

connected to the external oscillator signal and the X2 pin is floated.

Active-Low RAM Clear Input. If enabled by software, taking

RCLR

low will result in the clearing of the 114 bytes of user RAM. When

enabled,

RCLR

can be activated whether or not V

CC

is present.

Multiplexed Address/Data Bus. Multiplexed buses save pins because

address information and data information time-share the same signal

paths. The addresses are present during the first portion of the bus

cycle and the same pins and signal paths are used for data in the

second portion of the cycle. Address/data multiplexing does not slow

the access time of the DS1689 since the bus change from address to

data occurs during the internal RAM access time. Addresses must be

valid prior to the latter portion of ALE, at which time the

DS1689/DS1693 latches the address. Valid write data must be

present and held stable during the latter portion of the

WR

pulse. In a

read cycle, the DS1689/

DS1693 outputs 8 bits of data during the latter portion of the

RD

pulse. The read cycle is terminated and the bus returns to a high

impedance state as

RD

transitions high. The address/data bus also

serves as a bidirectional data path for the external extended RAM.

1

V

BAUX

2, 3

—

X1, X2

4

RCLR

5–12

AD0–AD7

2 of 36

DS1689/DS1693

SO

EDIP

NAME

FUNCTION

Active-Low Power-On Interrupt Output. The

PWR

pin is intended

for use as an on/off control for the system power. With V

CC

voltage

removed from the DS1689/DS1693,

PWR

may be automatically

activated from a kickstart input via the

KS

pin or from a wake-up

interrupt. Once the system is powered on, the state of

PWR

can be

controlled via bits in the Dallas registers.

Ground. DC power is provided to the device on this pin.

Active-Low Kickstart Input. When V

CC

is removed from the

DS1689/DS1693, the system can be powered on in response to an

active low transition on the

KS

pin, as might be generated from a

key closure. V

BAUX

must be present and auxiliary battery enable bit

(ABE) must be set to 1 if the kickstart function is used, and the

KS

pin must be pulled up to the V

BAUX

supply. While V

CC

is applied, the

KS

pin can be used as an interrupt input.

Active-Low Chip Select Input. This signal must be asserted low

during a bus cycle for the RTC portion of the DS1689/DS1693 to be

accessed.

CS

must be kept in the active state during

RD

and

WR

timing. Bus cycles, which take place with ALE asserted but without

asserting,

CS

will latch addresses. However, no data transfer will

occur.

Address Strobe Input (Active High). A pulse on the address strobe

pin serves to demultiplex the bus. The falling edge of ALE causes

the RTC address to be latched within the DS1689/DS1693.

Active-Low Write Data Strobe. The

WR

signal is an active low

signal. The

WR

signal defines the time period during which data is

written to the addressed register.

Active-Low Read Data Strobe.

RD

identifies the time period when

the DS1689/DS1693 drives the bus with RTC read data. The

RD

signal is an enable signal for the output buffers of the clock.

+3V or +5V Power Select. When PSEL is logic 1, 5V operation is

selected. When PSEL is logic 0 or is floated, the device is in

autosense mode and determines the correct mode of operation based

on the voltage on V

CCI

.

Active-Low Interrupt Request Output (Open Drain). The

IRQ

pin is

an active-low output of the DS1689/DS1693 that can be tied to the

interrupt input of a processor. The

IRQ

output remains low as long

as the status bit causing the interrupt is present and the

corresponding interrupt-enable bit is set. To clear the

IRQ

pin, the

application software must clear all enabled flag bits contributing to

IRQ’s

active state. When no interrupt conditions are present, the

IRQ

level is in the high impedance state. Multiple interrupting devices

can be connected to an

IRQ

bus. The

IRQ

pin is an open-drain

output and requires an external pullup resistor.

Battery Input for Any Standard 3V Lithium Cell or Other Energy

Source. Battery voltage must be held between 2.5V and 3.7V for

proper operation.

3 of 36

13

PWR

14, 19

14

GND

15

KS

16

CS

17

18

20

17

18

20

ALE

WR

RD

21

PSEL

22

IRQ

23

—

V

BAT

DS1689/DS1693

SO

EDIP

NAME

FUNCTION

Square-Wave Output. The SQW pin can output a signal from one of

13 taps provided by the 15 internal divider stages of the real time

clock. The frequency of the SQW pin can be changed by

programming Register A as shown in Table 2. The SQW signal can

be turned on and off using the SQWE bit in Register B. A 32kHz

SQW signal is output when SQWE = 1, the Enable 32kHz (E32K)

bit in extended register 04BH is logic 1, and V

CC

is above V

PF

. A

32kHz square wave is also available when V

CC

is less than V

PF

if

E32K = 1, ABE = 1, and voltage is applied to V

BAUX

.

External SRAM Power-Supply Output. This pin is internally

connected to V

CCI

when V

CCI

is within nominal limits. However,

during power fail, V

CCO

is internally connected to the V

BAT

or V

BAUX

(whichever is larger). For 5V operation, switchover from V

CCI

to the

backup supply occurs when V

CCI

drops below the larger of V

BAT

and

V

BAUX

. For 3V operation, switchover from V

CCI

to the backup supply

occurs at V

PF

if V

PF

is less than V

BAT

and V

BAUX

. If V

PF

is greater

than V

BAT

and V

BAUX

, the switch from V

CCI

to the backup supply

occurs when V

CCI

drops below the larger of V

BAT

and V

BAUX

.

+3V or +5V Main Supply. DC power is provided to the device on

these pins. 5V operation is selected when the PSEL pin is at logic 1.

If PSEL is floated or at logic 0, the device is in autosense mode and

determines the correct operating voltage based on the V

CCI

voltage

level.

Active-Low RAM Chip Enable Output. When power is valid,

CEO

will equal

CEI.

When power is not valid,

CEO

will be driven high

regardless of

CEI.

Active-Low RAM Chip Enable Input.

CEI

should be driven low to

enable the external RAM.

No Connection

24

SQW

25

V

CCO

26

V

CCI

27

28

—

27

28

2, 3,

19, 23

CEO

CEI

N.C.

4 of 36

DS1689/DS1693

DETAILED DESCRIPTION

The DS1689/DS1693 are real-time clocks (RTCs) designed as successors to the industry standard

DS1285, DS1385, DS1485, and DS1585 PC real-time clocks. These devices provide the industry

standard DS1285 clock function with the new feature of either +3.0V or +5.0V operation and automatic

backup and write protection to an external SRAM. The DS1689 also incorporates a number of enhanced

features including a silicon serial number, power-on/off control circuitry, and 114 bytes of user NV

SRAM, power-on elapsed timer, and power-cycle counter.

Each DS1689/DS1693 is individually manufactured with a unique 64-bit serial number as well as an

additional 64-bit customer specific ROM or serial number. The serial number is programmed and tested

at Dallas to ensure that no two devices are alike. The serial number can be used to electronically identify

a system for purposes such as establishment of a network node address or for maintenance tracking.

Customers can reserve blocks of available numbers from Dallas Semiconductor.

The serialized RTCs also incorporate power control circuitry, which allows the system to be powered on

via an external stimulus, such as a keyboard or by a time and date (wake-up) alarm. The

PWR

output pin

can be triggered by one or either of these events, and can be used to turn on an external power supply.

The

PWR

pin is under software control, so that when a task is complete, the system power can then be

shut down.

The DS1689/DS1693 incorporate a power-on elapsed time counter, a power-on cycle counter, and a

battery powered continuous counter. These three counters provide valuable information for maintenance

and warranty requirements.

Automatic backup and write protection for an external SRAM is provided through the V

CCO

and

CEO

pins. The lithium energy source used to permanently power the real time clock is also used to retain RAM

data in the absence of V

CC

power through the V

CCO

pin. The chip enable output to RAM (CEO) is

controlled during power transients to prevent data corruption.

The DS1689 is a clock/calendar chip with the features described above. An external crystal and battery

are the only components required to maintain time-of-day and memory status in the absence of power.

The DS1693 incorporates the DS1689 chip, a 32.768kHz crystal, and a lithium battery in a complete, self-

contained timekeeping module. The entire unit is fully tested at Dallas Semiconductor such that a

minimum of 10 years of timekeeping and data retention in the absence of V

CC

is guaranteed.

OPERATION

The block diagram in Figure 1 shows the pin connections with the major internal functions of the

DS1689/DS1693. The following paragraphs describe the function of each pin.

5 of 36

DS1689SN/R

DS1689SN/R Overview

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