IS61NVP102436-250B3 datasheet, PDF

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IS61NVP102436-250B3: DescriptionZBT SRAM, 1MX36, 2.6ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165; Categorystorage storage; File Size226KB，31 Pages; ManufacturerIntegrated Silicon Solution ( ISSI )

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IS61NVP102436-250B3 Overview

ZBT SRAM, 1MX36, 2.6ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165

IS61NVP102436-250B3 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Integrated Silicon Solution ( ISSI )
Parts packaging code	BGA
package instruction	13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165
Contacts	165
Reach Compliance Code	compliant
ECCN code	3A991.B.2.A
Maximum access time	2.6 ns
Other features	PIPELINED ARCHITECTURE
JESD-30 code	R-PBGA-B165
JESD-609 code	e0
length	15 mm
memory density	37748736 bit
Memory IC Type	ZBT SRAM
memory width	36
Number of functions	1
Number of terminals	165
word count	1048576 words
character code	1000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	1MX36
Package body material	PLASTIC/EPOXY
encapsulated code	TBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	2.625 V
Minimum supply voltage (Vsup)	2.375 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	13 mm

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IS61NLP51272/IS61NVP51272

IS61NLP102436/IS61NVP102436

512K x 72, 1024K x 36

36Mb, PIPELINE 'NO WAIT' STATE BUS SRAM

ISSI

ADVANCE INFORMATION

AUGUST 2003

FEATURES

• 100 percent bus utilization

• No wait cycles between Read and Write

• Internal self-timed write cycle

• Individual Byte Write Control

• Single Read/Write control pin

• Clock controlled, registered address,

data and control

• Interleaved or linear burst sequence control using

MODE input

• Three chip enables for simple depth expansion

and address pipelining

• Power Down mode

• Common data inputs and data outputs

•

CKE

pin to enable clock and suspend operation

• JEDEC 165-ball PBGA and 209-ball (x72)

PBGA packages

• Power supply:

NVP: V

2.5V (± 5%), V

DDQ

2.5V (± 5%)

NLP: V

3.3V (± 5%), V

DDQ

3.3V/2.5V (± 5%)

• JTAG Boundary Scan for PBGA packages

• Industrial temperature available

DESCRIPTION

The 36 Meg 'NLP/NVP' product family feature high-speed,

low-power synchronous static RAMs designed to provide

a burstable, high-performance, 'no wait' state, device for

networking and communications applications. They are

organized as 512K words by 72 bits and 1024K words

by 36 bits, fabricated with

ISSI

's advanced CMOS

technology.

Incorporating a 'no wait' state feature, wait cycles are

eliminated when the bus switches from read to write, or

write to read. This device integrates a 2-bit burst counter,

high-speed SRAM core, and high-drive capability outputs

into a single monolithic circuit.

All synchronous inputs pass through registers are controlled

by a positive-edge-triggered single clock input. Operations

may be suspended and all synchronous inputs ignored

when Clock Enable,

CKE

is HIGH. In this state the internal

device will hold their previous values.

All Read, Write and Deselect cycles are initiated by the

ADV input. When the ADV is HIGH the internal burst

counter is incremented. New external addresses can be

loaded when ADV is LOW.

Write cycles are internally self-timed and are initiated by

the rising edge of the clock inputs and when

is LOW.

Separate byte enables allow individual bytes to be written.

A burst mode pin (MODE) defines the order of the burst

sequence. When tied HIGH, the interleaved burst sequence

is selected. When tied LOW, the linear burst sequence is

selected.

FAST ACCESS TIME

Symbol

Parameter

Clock Access Time

Cycle Time

Frequency

-250

2.6

250

-200

3.1

200

Units

MHz

Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability

arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any

published information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com —

1-800-379-4774

Rev. 00A

08/26/03

IS61NVP102436-250B3 Related Products

	IS61NVP102436-250B3	IS61NVP51272-250B1	IS61NLP51272-200B1I	IS61NVP102436-250B3I	IS61NVP51272-200B1	IS61NVP102436-200B3	IS61NVP102436-200B3I	IS61NLP51272-250B1	IS61NVP51272-250BI1	IS61NLP51272-250B1I
Description	ZBT SRAM, 1MX36, 2.6ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165	ZBT SRAM, 512KX72, 2.6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209	ZBT SRAM, 512KX72, 3.1ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209	ZBT SRAM, 1MX36, 2.6ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165	ZBT SRAM, 512KX72, 3.1ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209	ZBT SRAM, 1MX36, 3.1ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165	ZBT SRAM, 1MX36, 3.1ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165	ZBT SRAM, 512KX72, 2.6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209	SRAM	ZBT SRAM, 512KX72, 2.6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compli	compli	compli
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0	e0
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	-	Contains lead
Maker	Integrated Silicon Solution ( ISSI )	-	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )
Parts packaging code	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA	-	BGA
package instruction	13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165	14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209	14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209	13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165	14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209	13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165	13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165	14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209	-	14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
Contacts	165	209	209	165	209	165	165	209	-	209
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	-	3A991.B.2.A
Maximum access time	2.6 ns	2.6 ns	3.1 ns	2.6 ns	3.1 ns	3.1 ns	3.1 ns	2.6 ns	-	2.6 ns
Other features	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	-	PIPELINED ARCHITECTURE
JESD-30 code	R-PBGA-B165	R-PBGA-B209	R-PBGA-B209	R-PBGA-B165	R-PBGA-B209	R-PBGA-B165	R-PBGA-B165	R-PBGA-B209	-	R-PBGA-B209
length	15 mm	22 mm	22 mm	15 mm	22 mm	15 mm	15 mm	22 mm	-	22 mm
memory density	37748736 bit	37748736 bit	37748736 bit	37748736 bit	37748736 bit	37748736 bit	37748736 bit	37748736 bi	-	37748736 bi
Memory IC Type	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM	ZBT SRAM	-	ZBT SRAM
memory width	36	72	72	36	72	36	36	72	-	72
Number of functions	1	1	1	1	1	1	1	1	-	1
Number of terminals	165	209	209	165	209	165	165	209	-	209
word count	1048576 words	524288 words	524288 words	1048576 words	524288 words	1048576 words	1048576 words	524288 words	-	524288 words
character code	1000000	512000	512000	1000000	512000	1000000	1000000	512000	-	512000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	-	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	85 °C	85 °C	70 °C	70 °C	85 °C	70 °C	-	85 °C
organize	1MX36	512KX72	512KX72	1MX36	512KX72	1MX36	1MX36	512KX72	-	512KX72
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY
encapsulated code	TBGA	BGA	BGA	TBGA	BGA	TBGA	TBGA	BGA	-	BGA
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	-	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE	GRID ARRAY	GRID ARRAY	GRID ARRAY, THIN PROFILE	GRID ARRAY	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY	-	GRID ARRAY
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	-	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	-	Not Qualified
Maximum seat height	1.2 mm	1.95 mm	1.95 mm	1.2 mm	1.95 mm	1.2 mm	1.2 mm	1.95 mm	-	1.95 mm
Maximum supply voltage (Vsup)	2.625 V	2.625 V	3.465 V	2.625 V	2.625 V	2.625 V	2.625 V	3.465 V	-	3.465 V
Minimum supply voltage (Vsup)	2.375 V	2.375 V	3.135 V	2.375 V	2.375 V	2.375 V	2.375 V	3.135 V	-	3.135 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	3.3 V	2.5 V	2.5 V	2.5 V	2.5 V	3.3 V	-	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	-	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	-	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	-	INDUSTRIAL
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL	-	BALL
Terminal pitch	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm	-	1 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	-	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED
width	13 mm	14 mm	14 mm	13 mm	14 mm	13 mm	13 mm	14 mm	-	14 mm

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