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IDT6116LA45PG

Description
Standard SRAM, 2KX8, 45ns, CMOS, PDIP24, 0.600 INCH, PLASTIC, DIP-24
Categorystorage    storage   
File Size137KB,12 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
Download Datasheet Parametric View All

IDT6116LA45PG Overview

Standard SRAM, 2KX8, 45ns, CMOS, PDIP24, 0.600 INCH, PLASTIC, DIP-24

IDT6116LA45PG Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeDIP
package instruction0.600 INCH, PLASTIC, DIP-24
Contacts24
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum access time45 ns
I/O typeCOMMON
JESD-30 codeR-PDIP-T24
JESD-609 codee3
length31.75 mm
memory density16384 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of ports1
Number of terminals24
word count2048 words
character code2000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize2KX8
Output characteristics3-STATE
ExportableYES
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.6
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Certification statusNot Qualified
Maximum seat height4.699 mm
Maximum standby current0.00002 A
Minimum standby current2 V
Maximum slew rate0.075 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width15.24 mm
CMOS Static RAM
16K (2K x 8-Bit)
Features
High-speed access and chip select times
– Military: 20/25/35/45/55/70/90/120/150ns (max.)
– Industrial: 20/25/35/45ns (max.)
– Commercial: 15/20/25/35/45ns (max.)
Low-power consumption
Battery backup operation
– 2V data retention voltage (LA version only)
Produced with advanced CMOS high-performance
technology
CMOS process virtually eliminates alpha particle soft-error
rates
Input and output directly TTL-compatible
Static operation: no clocks or refresh required
Available in ceramic and plastic 24-pin DIP, 24-pin Thin Dip,
24-pin SOIC and 24-pin SOJ
Military product compliant to MIL-STD-833, Class B
IDT6116SA
IDT6116LA
Description
The IDT6116SA/LA is a 16,384-bit high-speed static RAM
organized as 2K x 8. It is fabricated using IDT's high-performance,
high-reliability CMOS technology.
Access times as fast as 15ns are available. The circuit also offers a
reduced power standby mode. When
CS
goes HIGH, the circuit will
automatically go to, and remain in, a standby power mode, as long
as
CS
remains HIGH. This capability provides significant system level
power and cooling savings. The low-power (LA) version also offers a
battery backup data retention capability where the circuit typically
consumes only 1µW to 4µW operating off a 2V battery.
All inputs and outputs of the IDT6116SA/LA are TTL-compatible. Fully
static asynchronous circuitry is used, requiring no clocks or refreshing
for operation.
The IDT6116SA/LA is packaged in 24-pin 600 and 300 mil plastic or
ceramic DIP, 24-lead gull-wing SOIC, and 24-lead J-bend SOJ providing
high board-level packing densities.
Military grade product is manufactured in compliance to the latest
version of MIL-STD-883, Class B, making it ideally suited to military
temperature applications demanding the highest level of performance and
reliability.
Functional Block Diagram
A
0
V
CC
ADDRESS
DECODER
A
10
128 X 128
MEMORY
ARRAY
GND
I/O
0
INPUT
DATA
CIRCUIT
I/O
7
I/O CONTROL
,
CS
OE
WE
CONTROL
CIRCUIT
3089 drw 01
NOVEMBER 2006
1
©2006 Integrated Device Technology, Inc.
DSC-3089/06
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