SN74AUP1G99YZPR datasheet, PDF

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SN74AUP1G99YZPR: DescriptionLow-Power Ultra-Configurable Multiple-Function Gate with 3-State Outputs 8-DSBGA -40 to 85; Categorylogic logic; File Size1MB，27 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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SN74AUP1G99YZPR Overview

Low-Power Ultra-Configurable Multiple-Function Gate with 3-State Outputs 8-DSBGA -40 to 85

SN74AUP1G99YZPR Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	BGA
package instruction	VFBGA, BGA8,2X4,20
Contacts	8
Reach Compliance Code	compli
ECCN code	EAR99
Factory Lead Time	1 week
series	AUP/ULP/V
JESD-30 code	R-PBGA-B8
JESD-609 code	e1
length	1.9 mm
Load capacitance (CL)	30 pF
Logic integrated circuit type	LOGIC CIRCUIT
MaximumI(ol)	0.004 A
Humidity sensitivity level	1
Number of functions	1
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Encapsulate equivalent code	BGA8,2X4,20
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	1.2/3.3 V
Prop。Delay @ Nom-Su	36.1 ns
Certification status	Not Qualified
Schmitt trigger	YES
Maximum seat height	0.5 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.1 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL
Terminal pitch	0.5 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	0.9 mm

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Description	Low-Power Ultra-Configurable Multiple-Function Gate with 3-State Outputs 8-DSBGA -40 to 85	Low-Power Ultra-Configurable Multiple-Function Gate with 3-State Outputs 8-SM8 -40 to 85	Low-Power Ultra-Configurable Multiple-Function Gate with 3-State Outputs 8-VSSOP -40 to 85	Logic Gates Lo PWR Ultra Config Multi Funct Gate	Low-Power Ultra-Configurable Multiple-Function Gate with 3-State Outputs 8-SM8 -40 to 85	Low-Power Ultra-Configurable Multiple-Function Gate with 3-State Outputs 8-VSSOP -40 to 85
Brand Name	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
Is it lead-free?	Lead free	Lead free	Lead free	Contains lead	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to
Maker	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
Parts packaging code	BGA	SOIC	SOIC	SOIC	SOIC	SOIC
package instruction	VFBGA, BGA8,2X4,20	LSSOP, SSOP8,.16	VSSOP, TSSOP8,.12,20	VSSOP, TSSOP8,.12,20	LSSOP, SSOP8,.16	VSSOP, TSSOP8,.12,20
Contacts	8	8	8	8	8	8
Reach Compliance Code	compli	compli	compli	compli	compli	compli
series	AUP/ULP/V	AUP/ULP/V	AUP/ULP/V	AUP/ULP/V	AUP/ULP/V	AUP/ULP/V
JESD-30 code	R-PBGA-B8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8
JESD-609 code	e1	e4	e4	e4	e4	e4
length	1.9 mm	2.95 mm	2.3 mm	2.3 mm	2.95 mm	2.3 mm
Load capacitance (CL)	30 pF	30 pF	30 pF	30 pF	30 pF	30 pF
Logic integrated circuit type	LOGIC CIRCUIT	LOGIC CIRCUIT	LOGIC CIRCUIT	LOGIC CIRCUIT	LOGIC CIRCUIT	LOGIC CIRCUIT
MaximumI(ol)	0.004 A	0.004 A	0.004 A	0.0017 A	0.004 A	0.004 A
Humidity sensitivity level	1	1	1	1	1	1
Number of functions	1	1	1	1	1	1
Number of terminals	8	8	8	8	8	8
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VFBGA	LSSOP	VSSOP	VSSOP	LSSOP	VSSOP
Encapsulate equivalent code	BGA8,2X4,20	SSOP8,.16	TSSOP8,.12,20	TSSOP8,.12,20	SSOP8,.16	TSSOP8,.12,20
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
method of packing	TR	TR	TR	TAPE AND REEL	TR	TR
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260
power supply	1.2/3.3 V	1.2/3.3 V	1.2/3.3 V	1.2/3.3 V	1.2/3.3 V	1.2/3.3 V
Prop。Delay @ Nom-Su	36.1 ns	36.1 ns	36.1 ns	36.1 ns	36.1 ns	36.1 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Schmitt trigger	YES	YES	YES	YES	YES	YES
Maximum seat height	0.5 mm	1.3 mm	0.9 mm	0.9 mm	1.3 mm	0.9 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	0.8 V	0.8 V	0.8 V	0.8 V	0.8 V	0.8 V
Nominal supply voltage (Vsup)	1.1 V	1.1 V	1.1 V	1.1 V	1.1 V	1.1 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	BALL	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.65 mm	0.5 mm	0.5 mm	0.65 mm	0.5 mm
Terminal location	BOTTOM	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	0.9 mm	2.8 mm	2 mm	2 mm	2.8 mm	2 mm
Factory Lead Time	1 week	1 week	1 week	-	1 week	1 week
Output polarity	TRUE	TRUE	TRUE	-	TRUE	TRUE
Base Number Matches	-	1	1	1	1	1

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