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IRGCC40KEPBF

Description
Insulated Gate Bipolar Transistor, 600V V(BR)CES, N-Channel, DIE-2
CategoryDiscrete semiconductor    The transistor   
File Size18KB,1 Pages
ManufacturerInfineon
Websitehttp://www.infineon.com/
Environmental Compliance
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IRGCC40KEPBF Overview

Insulated Gate Bipolar Transistor, 600V V(BR)CES, N-Channel, DIE-2

IRGCC40KEPBF Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerInfineon
package instructionUNCASED CHIP, R-XUUC-N2
Reach Compliance Codecompliant
Other featuresULTRA FAST SPEED
Collector-emitter maximum voltage600 V
ConfigurationSINGLE
JESD-30 codeR-XUUC-N2
Number of components1
Number of terminals2
Package body materialUNSPECIFIED
Package shapeRECTANGULAR
Package formUNCASED CHIP
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
surface mountYES
Terminal formNO LEAD
Terminal locationUPPER
Maximum time at peak reflow temperatureNOT SPECIFIED
Transistor component materialsSILICON
PD-9.1427
TARGET
IRGCC40KE
IRGCC40KE IGBT Die in Wafer Form
C
G
E
600 V
Size 4
Ultra-Fast Speed
5" Wafer
Electrical Characteristics ( Wafer Form )
Parameter
V
CE (on)
V
(BR)CES
V
GE(th)
I
CES
I
GES
Description
Collector-to-Emitter Saturation Voltage
Colletor-to-Emitter Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Collector Current
Gate-to-Emitter Leakage Current
Guaranteed (Min/Max)
Test Conditions
4.1V Max.
I
C
= 20A, T
J
= 25°C, V
GE
= 15V
600V Min.
T
J
= 25°C, I
CES
= 250µA, V
GE
= 0V
3.0V Min., 5.5V Max.
V
GE
= V
CE
, T
J
=25°C, I
C
=250µA
250 µA Max.
T
J
= 25°C, V
CE
= 600V
±
500 nA Max.
T
J
= 25°C, V
GE
= +/- 20V
Mechanical Data
Norminal Backmetal Composition, Thickness:
Norminal Front Metal Composition, Thickness:
Dimensions:
Wafer Diameter:
Wafer thickness:
Relevant Die Mechanical Dwg. Number
Minimum Street Width
Reject Ink Dot Size
Ink Dot Location
Recommended Storage Environment:
Reference Standard IR packaged part ( for design ) : IRGPC40K
Cr-Ni-Ag ( 1kA-4kA-6kA )
99% Al, 1% Si (3 microns)
0.170" x 0.232"
125mm, with std. < 100 > flat
.015" + / -.003"
01-5101
100 Microns
0.25mm Diameter Minimum
See Die Outline drawing below
Store in original container, in dessicated
nitrogen, with no contamination
Die Outline
INK DOT
LOCATION
3.28
(.129 )
NOTES :
1. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES )
2. CONTROLLING DIMENSION : ( INCH )
3. LETTER DESIGNATION :
S = SOURCE
G = GATE
4. DIMENSIONAL TOLERANCES
BONDING PADS : < 0.635 TOLERANCE = +/- 0.013
WIDTH
< (.0250 ) TOLERANCE =+/- (.0005 )
&
> 0.635 TOLERANCE = +/- 0.025
LENGTH
> (.0250 ) TOLERANCE = +/- (.0010 )
OVERALL DIE
< 1.270 TOLERANCE = +/- 0.102
WIDTH
< (.050 ) TOLERANCE = +/- (.004 )
&
> 0.635 TOLERANCE = +/- 0.203
LENGTH
> (.050 ) TOLERANCE = +/- (.008 )
5. UNLESS OTHERWISE NOTED ALL DIE ARE GEN III
1.45
(.057 )
EMITTER
5.89
(.232 )
G
0.73
(.029 )
0.72
(.028 )
4.31
(.170 )

IRGCC40KEPBF Related Products

IRGCC40KEPBF IRGCC40KE
Description Insulated Gate Bipolar Transistor, 600V V(BR)CES, N-Channel, DIE-2 Insulated Gate Bipolar Transistor, 600V V(BR)CES, N-Channel, DIE-2
Is it Rohs certified? conform to incompatible
Maker Infineon Infineon
package instruction UNCASED CHIP, R-XUUC-N2 DIE-2
Reach Compliance Code compliant unknown
Other features ULTRA FAST SPEED ULTRA FAST SPEED
Collector-emitter maximum voltage 600 V 600 V
Configuration SINGLE SINGLE
JESD-30 code R-XUUC-N2 R-XUUC-N2
Number of components 1 1
Number of terminals 2 2
Package body material UNSPECIFIED UNSPECIFIED
Package shape RECTANGULAR RECTANGULAR
Package form UNCASED CHIP UNCASED CHIP
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
Polarity/channel type N-CHANNEL N-CHANNEL
surface mount YES YES
Terminal form NO LEAD NO LEAD
Terminal location UPPER UPPER
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
Transistor component materials SILICON SILICON
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