PALC16R6Q-25CJSTD datasheet, PDF

PALC16R6Q-25CJSTD: DescriptionOT PLD, 25ns, CMOS, CDIP20, CERAMIC, DIP-20; CategoryProgrammable logic devices Programmable logic; File Size592KB，24 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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PALC16R6Q-25CJSTD Overview

OT PLD, 25ns, CMOS, CDIP20, CERAMIC, DIP-20

Parameter Name	Attribute value
Maker	AMD
Parts packaging code	DIP
package instruction	DIP,
Contacts	20
Reach Compliance Code	unknown
maximum clock frequency	28.5 MHz
JESD-30 code	R-GDIP-T20
length	24.435 mm
Dedicated input times	8
Number of I/O lines	2
Number of terminals	20
Maximum operating temperature	75 °C
Minimum operating temperature
organize	8 DEDICATED INPUTS, 2 I/O
Output function	MIXED
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Programmable logic type	OT PLD
propagation delay	25 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm

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