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PA28F800BV-T120

Description
Flash, 1MX8, 150ns, PDSO44, 0.525 X 1.110 INCH, PLASTIC, SOP-44
Categorystorage    storage   
File Size556KB,77 Pages
ManufacturerIntel
Websitehttp://www.intel.com/
Download Datasheet Parametric View All

PA28F800BV-T120 Overview

Flash, 1MX8, 150ns, PDSO44, 0.525 X 1.110 INCH, PLASTIC, SOP-44

PA28F800BV-T120 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeSOIC
package instruction0.525 X 1.110 INCH, PLASTIC, SOP-44
Contacts44
Reach Compliance Codeunknow
ECCN codeEAR99
Maximum access time150 ns
Other featuresCAN BE OPERATED IN 4.5V TO 5.5V; CAN BE CONFG AS 512K X 16; TOP BOOT BLOCK
Spare memory width8
startup blockTOP
command user interfaceYES
Data pollingNO
Durability100000 Write/Erase Cycles
JESD-30 codeR-PDSO-G44
JESD-609 codee0
length28.2 mm
memory density8388608 bi
Memory IC TypeFLASH
memory width8
Number of functions1
Number of departments/size1,2,1,7
Number of terminals44
word count1048576 words
character code1000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize1MX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP44,.63
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
power supply3.3/5 V
Programming voltage5 V
Certification statusNot Qualified
Maximum seat height2.95 mm
Department size16K,8K,96K,128K
Maximum standby current0.000008 A
Maximum slew rate0.065 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
switch bitNO
typeNOR TYPE
width13.3 mm
Base Number Matches1
PRODUCT PREVIEW
8-MBIT (512K X 16, 1024K X 8)
SmartVoltage BOOT BLOCK
FLASH MEMORY FAMILY
28F800BV-T/B, 28F800CV-T/B, 28F008BV-T/B
28F800CE-T/B, 28F008BE-T/B
Intel SmartVoltage Technology
5V or 12V Program/Erase
2.7V, 3.3V or 5V Read Operation
Program Time Reduced 60% at
12V V
PP
Very High Performance Read
5V: 70/120 ns Max. Access Time,
30/40 ns Max. Output Enable Time
3V: 120/150 ns Max Access
65 ns Max. Output Enable Time
2.7V: 120 ns Max Access
65 ns Max. Output Enable Time
Low Power Consumption
Max 60 mA Read Current at 5V
Max 30 mA Read Current at 2.7–3.6V
x8/x16-Selectable Input/Output Bus
28F800 for High Performance 16- or
32-bit CPUs
x8-Only Input/Output Architecture
28F008B for Space-Constrained
8-bit Applications
Optimized Array Blocking Architecture
One 16-KB Protected Boot Block
Two 8-KB Parameter Blocks
One 96-KB Main Block
Seven 128-KB Main Blocks
Top or Bottom Boot Locations
Absolute Hardware-Protection for Boot
Block
Software EEPROM Emulation with
Parameter Blocks
Extended Temperature Operation
–40°C to +85°C
Extended Cycling Capability
100,000 Block Erase Cycles
(Commercial Temperature)
10,000 Block Erase Cycles
(Extended Temperature)
Automated Word/Byte Write and Block
Erase
Industry-Standard Command User
Interface
Status Registers
Erase Suspend Capability
SRAM-Compatible Write Interface
Automatic Power Savings Feature
1 mA Typical I
CC
Active Current in
Static Operation
Reset/Deep Power-Down Input
0.2 µA I
CC
Typical
Provides Reset for Boot Operations
Hardware Data Protection Feature
Erase/Write Lockout during Power
Transitions
Industry-Standard Surface Mount
Packaging
40-Lead TSOP
44-Lead PSOP: JEDEC ROM
Compatible
48-Lead TSOP
Footprint Upgradeable from 2-Mbit and
4-Mbit Boot Block Flash Memories
ETOX™ IV Flash Technology
Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including infringement of any
patent or copyright, for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale for such products. Information
contained herein supersedes previously published specifications on these devices from Intel.
© INTEL CORPORATION 1995
September 1995
Order Number: 290539-002
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