ADS8371
SLAS390A − JUNE 2003 − REVISED DECEMBER 2003
16 BIT, 750 kHz, UNIPOLAR INPUT, MICRO POWER SAMPLING
ANALOG TO DIGITAL CONVERTER WITH PARALLEL INTERFACE
FEATURES
D
750-KSPS Sample Rate
D
High Linearity:
D
D
D
D
D
D
D
D
D
D
APPLICATIONS
D
D
D
D
D
Medical Instruments
Optical Networking
Transducer Interface
High Accuracy Data Acquisition Systems
Magnetometers
− +0.9 LSB INL Typ,
+1.5
LSB Max
− −0.4/+0.6 LSB DNL Typ,
+1
LSB Max
Onboard Reference Buffer and Conversion
Clock
0 V to 4.096 V Unipolar Inputs
Low Noise: 88 dB SNR
High Dynamic Range: 110 dB SFDR
Very Low Offset and Offset Drift
Low Power: 130 mW at 750 KSPS
Wide Buffer Supply, 2.7 V to 5.25 V
Flexible 8-/16-Bit Parallel Interface
Direct Pin Compatible With
ADS8381/ADS8383
48-Pin TQFP Package
DESCRIPTION
The ADS8371 is an 16-bit, 750 kHz A/D converter. The
device includes a 16-bit capacitor-based SAR A/D
converter with inherent sample and hold. The ADS8371
offers a full 16-bit interface or an 8-bit bus option using two
read cycles.
The ADS8371 is available in a 48-lead TQFP package and
is characterized over the industrial −40°C to 85°C
temperature range.
SAR
+IN
−IN
REFIN
+
_
Output
Latches
and
3-State
Drivers
BYTE
16-/8-Bit
Parallel DATA
Output Bus
CDAC
Comparator
Conversion
and
Control Logic
CONVST
BUSY
CS
RD
Clock
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright
2003, Texas Instruments Incorporated
ADS8371
SLAS390A − JUNE 2003 − REVISED DECEMBER 2003
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
MAXIMUM
INTEGRAL
LINEARITY
(LSB)
MAXIMUM
DIFFERENTIAL
LINEARITY
(LSB)
NO
MISSING
CODES
RESOLU-
TION (BIT)
PACKAGE
TYPE
PACKAGE
DESIGNATOR
TEMPER-
ATURE
RANGE
ORDERING
INFORMATION
TRANS-
PORT
MEDIA
QUANTITY
Tape and
reel 250
Tape and
reel 1000
Tape and
reel 250
Tape and
reel 1000
MODEL
ADS8371IPFBT
ADS8371I
±2.5
−1/1.5
16
48 Pin
TQFP
PFB
−40 C
−40°C to
85°C
ADS8371IPFBR
ADS8371IBPFBT
ADS8371IB
±1.5
±1
16
48 Pin
TQFP
PFB
−40 C
−40°C to
85°C
ADS8371IBPFBR
NOTE: For the most current specifications and package information, refer to our website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
UNIT
+IN to AGND
Voltage
−IN to AGND
+VA to AGND
Voltage range
+VBD to BDGND
+VA to +VBD
Digital input voltage to BDGND
Digital output voltage to BDGND
Operating free-air temperature range, TA
Storage temperature range, Tstg
Junction temperature (TJ max)
Power dissipation
TQFP package
θ
JA thermal impedance
Vapor phase (60 sec)
Lead temperature, soldering
Infrared (15 sec)
−0.4 V to +VA + 0.1 V
−0.4 V to 0.5 V
−0.3 V to 7 V
−0.3 V to 7 V
−0.3 V to 2.55 V
−0.3 V to +VBD + 0.3 V
−0.3 V to +VBD + 0.3 V
−40°C to 85°C
−65°C to 150°C
150°C
(TJMax − TA)/θJA
86°C/W
215°C
220°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
www.ti.com
ADS8371
SLAS390A − JUNE 2003 − REVISED DECEMBER 2003
SPECIFICATIONS
TA = −40°C to 85°C, +VA = 5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 750 kHz (unless otherwise noted)
PARAMETER
Analog Input
Full-scale input voltage (see Note 1)
Absolute input voltage
Input capacitance
Input leakage current
System Performance
Resolution
No missing codes
Integral linearity (see Notes 2 and 3)
Differential linearity
Offset error
Gain error (see Note 4)
Noise
Power supply rejection ratio
Sampling Dynamics
Conversion time
Acquisition time
Throughput rate
Aperture delay
Aperture jitter
Step response
Over voltage recovery
(1) Ideal input span, does not include gain or offset error.
(2) LSB means least significant bit
(3) This is endpoint INL, not best fit.
(4) Measured relative to an ideal full-scale input (+IN − −IN) of 4.096 V
4
15
150
150
0.2
750
4
15
150
150
1.13
0.2
750
1.13
µs
µs
kHz
ns
ps
ns
ns
At 3FFFFh
output code
16
−1.5
−1
−0.75
−0.075
60
75
−0.8/0.9
−0.4/0.6
±0.25
1.5
1
0.75
0.075
16
16
−2.5
−1
−1
−0.15
60
75
±0.5
2.5
1.5
1
0.15
16
Bits
Bits
LSB
LSB
mV
%FS
µV
RMS
dB
+IN − −IN
+IN
−IN
0
−0.2
−0.2
45
1
Vref
Vref + 0.2
0.2
0
−0.2
−0.2
45
1
Vref
Vref + 0.2
0.2
V
V
pF
nA
TEST
CONDITIONS
ADS8371IB
MIN
TYP
MAX
MIN
ADS8371I
TYP
MAX
UNIT
3
ADS8371
SLAS390A − JUNE 2003 − REVISED DECEMBER 2003
www.ti.com
SPECIFICATIONS (CONTINUED)
TA = −40°C to 85°C, +VA = +5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 750 kHz (unless otherwise noted)
ADS8371IB
ADS8371I
TEST
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
Dynamic Characteristics
1 kHz
10 kHz
Total harmonic distortion (THD) (see Note 1)
50 kHz
100 kHz
1 kHz
10 kHz
Signal to noise ratio (SNR) (see Note 1)
50 kHz
100 kHz
1 kHz
Signal to noise + distortion
(SINAD) (see Note 1)
10 kHz
50 kHz
100 kHz
1 kHz
Spurious free dynamic range (SFDR) (see
Note 1)
10 kHz
50 kHz
100 kHz
−3dB Small signal bandwidth
Voltage Reference Input
Reference voltage at REFIN, Vref
Reference resistance (see Note 2)
Reference current drain
fs = 750 kHz
(1) Calculated on the first nine harmonics of the input frequency
(2) Can vary
±20%
2.5
4.096
500
1
4.2
2.5
4.096
500
1
4.2
V
kΩ
mA
−106
−99
−92
−90
87.7
87.5
87.2
87
87.6
87
86
85
110
100
95
94
3
−100
−96
−90
−88
87
87
87
87
87
86
85
84
106
97
92
90
3
MHz
dB
dB
dB
dB
UNIT
MAX
UNIT
4
www.ti.com
ADS8371
SLAS390A − JUNE 2003 − REVISED DECEMBER 2003
SPECIFICATIONS (CONTINUED)
TA = −40°C to 85°C, +VA = +5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 750 kHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
Digital Input/Output
Logic family
VIH
VIL
VOH
VOL
IIH = 5
µA
IIL = 5
µA
IOH = 2 TTL loads
IOL = 2 TTL loads
+VBD−1
−0.3
+VBD − 0.6
0.4
Straight
Binary
CMOS
+VBD + 0.3
0.8
V
MAX
UNIT
Logic level
Data format
Power Supply Requirements
+VBD Buffer supply
Power supply voltage
+VA Analog Supply
Supply current, 750-kHz sample rate (1)
Power dissipation, 750-kHz sample rate (1)
Temperature Range
Operating free-air
−40
(1) This includes only +VA current. +VBD current is typical 1 mA with 5 pF load capacitance on all output pins.
2.7
4.75
3.3
5
26
130
5.25
5.25
28
140
85
V
V
mA
mW
°C
5
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