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8MJ4-200.000AJI

Description
Oscillator
CategoryPassive components    oscillator   
File Size248KB,4 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

8MJ4-200.000AJI Overview

Oscillator

8MJ4-200.000AJI Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Reach Compliance Codeunknown
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8Mx4
nOUT
OUT
V
DD
Crystal Oscillator:
LVDS C
LOCK
O
UTPUT
ICS8Mx4
L
OW
J
ITTER
, H
IGH
F
REQUENCY
X
TAL
O
SCILLATOR
(including initial accuracy, operating temperature variation,
supply voltage variation, load variation, reflow drift, and aging for 10 years)
Low phase jitter < 1 ps rms maximum
(12kHz to 20MHz)
6-pin CERHERMETIC 5 x 7 x 1.5mm SMT
E
LECTRICAL
S
PECIFICATIONS
Unless stated otherwise, V
DD
= 2.5 Volts + 5% or 3.3 Volts + 5%, T
A
= 0
o
C to +70
o
C (commercial), T
A
= -40
o
C to +85
o
C (industrial)
Parameter
Min
Typ
Max
Unit
Conditions
DC
C
HARACTERISTICS
Power Supply Voltage
V
DD
3.135
3.3
3.465
V
3.3V operation
Power Supply
2.375
2.5
2.625
V
2.5V operation
in
8MJ4 and 8MK4 only
(V
DD
, V
EE
pins)
Power Supply Current
I
EE
83
mA
OE
= V
DD
Current with Output Disable
Input Capacitance
Input High Voltage
Output Enable
Input Low Voltage
(OE pin)
LVCMOS/LVTTL Input High Current
Input Low Current
Internal Pull-up Resistor
Clock Output
Level
(OUT, nOUT)
LVDS
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
I
OED
C
IN
V
IH
V
IL
I
IH
I
IL
R
PULLUP
V
OD
V
OD
V
OS
V
OS
75
∆f/f
O
odc
t
R
t
F
t
OSC
50
600
600
10
1.25
150
750
±100
±50
Output Duty Cycle
Output Rise Time
Output Fall Time
Oscillator Start-up Time
-150
51
350
50
0.7 x
V
DD
5
4
<0.6
mA
pF
V
0.3 x
V
DD
V
µA
µA
kΩ
mV
mV
V
mV
MHz
ppm p-p
ppm p-p
%
ps
ps
ms
20%
to
80%
of V
OD
20%
to
80%
of V
OD
in 8MH4 and 8MK4
in 8MG4 and 8MJ4
All conditions
Includes frequency set,
V
DD
,
T
A
& load variation,
reflow drift, 10 yr. aging
See
Output Duty Cycle diagram
and Rise and Fall Time diagram
in P
ARAMETER
M
EASUREMENT
I
NFORMATION
.
OE
= G
ND
V
DD
= V
IN
= 2.625 or 3.465V
V
DD
= 2.625 or 3.465V,
V
IN
= 0V
100Ω
terminatation between
OUT
and
nOUT
.
See P
ARAMETER
M
EASUREMENT
I
NFORMATION
.
AC
C
HARACTERISTICS
Output Frequency Range
Output
Frequency Stability error
(OUT, nOUT)
Time at Min. V
DD
(3.135V or 2.375V) to be 0s
(design target)
Deterministic
Random
Root Mean Square
Peak to Peak
Accumulated Jitter
n = 2 to 50,000 cycles
σ
of Random jitter
σ
of Total jitter distribution
RMS Phase Jitter, (Random)
1
t
jit(Ø)
Jitter
t
DS
t
RS
t
RMS
t
P
-
P
t
acc
1
2
2
2
2
0.2
3
3
25
4
<1
ps rms
design target
ps
ps
ps
ps
ps
Note 1: Measured using an Aeroflex PN9500 with a 12 kHz to 20MHz integration range.
Note 2: Measured using a Wavecrest SIA-3000.
S
UPPLY
V
OLTAGE
& F
REQUENCY
A
CCURACY
G
H
J
K
=
=
=
=
3.3V
3.3V
2.5V / 3.3V
2.5V / 3.3V
±50
ppm
±
100 ppm
±
50 ppm
±
100 ppm
ICS8Mx4 Datasheet Rev A
I n t e g r a t e d C i r c u i t S y s t e m s, I n c .
Revised 30Nov2004
Networking & Communications
w w w. i c s t . c o m
tel (508) 852-5400
V
EE
OE
NC
Stable, ultra low jitter, LVDS clock generation
For Gigabit Ethernet, Fibre Channel, PCI-Express,
other applications
Clock output frequencies from 75 to 750 MHz
One differential LVDS clock output
Output Enable
(OE)
pin
(tri-state – with ultra low current – when low)
Small 6-pin 5 x 7 x 1.5mm SMT ceramic package
Low profile package allows back-side PCB mounting
Pb-free RoHS compliant (by default; no additional code required)
2.5V or 3.3V device power supply options
Commercial
(0 to +70 C) and
Industrial
(-40 to +85 C)
temperatures
Frequency stability of ±50 or ±100 ppm
O
O
6
8 M x4
(Top View)
2
5
3
1
4
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