74AUP1G57GF datasheet, PDF - EEWORLD Datasheet

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74AUP1G57GF: DescriptionLow-power configurable multiple function gate; Categorylogic logic; File Size155KB，22 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74AUP1G57GF Overview

Low-power configurable multiple function gate

74AUP1G57GF Parametric

Parameter Name	Attribute value
Source Url Status Check Date	2013-06-14 00:00:00
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SON
package instruction	VSON,
Contacts	6
Reach Compliance Code	compli
series	AUP/ULP/V
JESD-30 code	S-PDSO-N6
JESD-609 code	e3
length	1 mm
Logic integrated circuit type	LOGIC CIRCUIT
Humidity sensitivity level	1
Number of functions	1
Number of terminals	6
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	VSON
Package shape	SQUARE
Package form	SMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	0.5 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.1 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.35 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	1 mm
Base Number Matches	1

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74AUP1G57

Low-power configurable multiple function gate

Rev. 4 — 20 July 2010

Product data sheet

1. General description

The 74AUP1G57 provides configurable multiple functions. The output state is determined

by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,

NOR, XNOR, inverter, and buffer. All inputs can be connected to V

or GND.

This device ensures a very low static and dynamic power consumption across the entire

range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing the damaging backflow current through the device

when it is powered down.

The 74AUP1G57 has Schmitt trigger inputs making it capable of transforming slowly

changing input signals into sharply defined, jitter-free output signals.

The inputs switch at different points for positive and negative-going signals. The difference

between the positive voltage V

T+

and the negative voltage V

T−

is defined as the input

hysteresis voltage V

2. Features and benefits

Wide supply voltage range from 0.8 V to 3.6 V

High noise immunity

ESD protection:

HBM JESD22-A114F exceeds 5000 V

MM JESD22-A115-A exceeds 200 V

CDM JESD22-C101E exceeds 1000 V

Low static power consumption; I

= 0.9

μA

(maximum)

Latch-up performance exceeds 100 mA per JESD 78 Class II

Inputs accept voltages up to 3.6 V

Low noise overshoot and undershoot < 10 % of V

OFF

circuitry provides partial power-down mode operation

Multiple package options

Specified from

−40 °C

to +85

°C

and

−40 °C

to +125

°C

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