PALC18U8Q-25CN datasheet, PDF - EEWORLD Datasheet

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PALC18U8Q-25CN: DescriptionProgrammable Logic Device, PAL-Type, CMOS, PDIP20; CategoryProgrammable logic devices Programmable logic; File Size1MB，18 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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PALC18U8Q-25CN Overview

Programmable Logic Device, PAL-Type, CMOS, PDIP20

PALC18U8Q-25CN Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	AMD
package instruction	DIP, DIP20,.3
Reach Compliance Code	unknown
Architecture	PAL-TYPE
maximum clock frequency	28.5 MHz
JESD-30 code	R-PDIP-T20
JESD-609 code	e0
Number of entries	18
Output times	8
Number of product terms	74
Number of terminals	20
Maximum operating temperature	70 °C
Minimum operating temperature
Output function	MACROCELL
Package body material	PLASTIC
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Certification status	Not Qualified
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

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PALC18U8Q-25CN Related Products

	PALC18U8Q-25CN	PALC18U8Q-35CN	PALC18U8Q-35CQ	PALC18U8Q-25CJ	PALC18U8Q-25CNL	PALC18U8Q-25CQ	PALC18U8Q-35CJ
Description	Programmable Logic Device, PAL-Type, CMOS, PDIP20	Programmable Logic Device, PAL-Type, CMOS, PDIP20	Programmable Logic Device, PAL-Type, CMOS, CDIP20	Programmable Logic Device, PAL-Type, CMOS, CDIP20	Programmable Logic Device, PAL-Type, CMOS, PQCC20	Programmable Logic Device, PAL-Type, CMOS, CDIP20	Programmable Logic Device, PAL-Type, CMOS, CDIP20
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Architecture	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE
maximum clock frequency	28.5 MHz	20 MHz	20 MHz	28.5 MHz	28.5 MHz	28.5 MHz	20 MHz
JESD-30 code	R-PDIP-T20	R-PDIP-T20	R-XDIP-T20	R-XDIP-T20	S-PQCC-J20	R-XDIP-T20	R-XDIP-T20
JESD-609 code	e0	e0	e0	e0	e0	e0	e0
Number of entries	18	18	18	18	18	18	18
Output times	8	8	8	8	8	8	8
Number of product terms	74	74	74	74	74	74	74
Number of terminals	20	20	20	20	20	20	20
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Output function	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	PLASTIC	PLASTIC	CERAMIC	CERAMIC	PLASTIC	CERAMIC	CERAMIC
encapsulated code	DIP	DIP	DIP	DIP	QCCJ	DIP	DIP
Encapsulate equivalent code	DIP20,.3	DIP20,.3	DIP20,.3	DIP20,.3	LDCC20,.4SQ	DIP20,.3	DIP20,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	IN-LINE	CHIP CARRIER	IN-LINE	IN-LINE
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	YES	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	J BEND	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	1.27 mm	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	QUAD	DUAL	DUAL
Maker	AMD	-	-	AMD	AMD	AMD	AMD
package instruction	DIP, DIP20,.3	DIP, DIP20,.3	DIP, DIP20,.3	-	QCCJ, LDCC20,.4SQ	DIP, DIP20,.3	DIP, DIP20,.3

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