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HY29F002BT-45

Description
Flash, 256KX16, 45ns, PDSO32, TSOP-32
Categorystorage    storage   
File Size457KB,40 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
Download Datasheet Parametric View All

HY29F002BT-45 Overview

Flash, 256KX16, 45ns, PDSO32, TSOP-32

HY29F002BT-45 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSK Hynix
Parts packaging codeTSOP
package instructionTSOP1, TSSOP32,.8,20
Contacts32
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time45 ns
Other featuresMINIMUM 100000 PROGRAM/ERASE CYCLES
startup blockBOTTOM
command user interfaceYES
Data pollingYES
Durability100000 Write/Erase Cycles
JESD-30 codeR-PDSO-G32
JESD-609 codee0
length18.4 mm
memory density4194304 bit
Memory IC TypeFLASH
memory width16
Number of functions1
Number of departments/size1,2,1,3
Number of terminals32
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256KX16
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Encapsulate equivalent codeTSSOP32,.8,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
power supply5 V
Programming voltage5 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Department size16K,8K,32K,64K
Maximum standby current0.000005 A
Maximum slew rate0.06 mA
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
switch bitYES
typeNOR TYPE
width8 mm
HY29F002
2 Megabit (256K x 16), 5 Volt-only, Flash Memory
KEY FEATURES
n
5 Volt Read, Program, and Erase
– Minimizes system-level power requirements
n
High Performance
– Access times as fast as 45 ns
n
Low Power Consumption
– 20 mA typical active read current
– 30 mA typical program/erase current
– 1 µA typical CMOS standby current
n
Compatible with JEDEC Standards
– Package, pinout and command-set
compatible with the single-supply Flash
device standard
– Provides superior inadvertent write
protection
n
Sector Erase Architecture
– Boot sector architecture with top and
bottom boot block options available
– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte
and three 64K byte sectors
– A command can erase any combination of
sectors
– Supports full chip erase
n
Erase Suspend/Resume
– Temporarily suspends a sector erase
operation to allow data to be read from, or
programmed into, any sector not being
erased
GENERAL DESCRIPTION
The HY29F002 is an 2 Megabit, 5 volt-only CMOS
Flash memory organized as 262,144 (256K) bytes.
The device is offered in industry-standard 32-pin
PDIP, TSOP and PLCC packages.
The HY29F002 can be programmed and erased
in-system with a single 5-volt V
CC
supply. Inter-
nally generated and regulated voltages are pro-
vided for program and erase operations, so that
the device does not require a high voltage power
supply to perform those functions. The device can
also be programmed in standard EPROM pro-
grammers. Access times as fast as 55ns over the
full operating voltage range of 5.0 volts ± 10% are
offered for timing compatibility with the zero wait
state requirements of high speed microprocessors.
A 45ns version operating over 5.0 volts ± 5% is
also available. To eliminate bus contention, the
18
A[17:0]
RESET#
CE#
OE#
WE#
DQ[7:0]
8
n
Sector Protection
– Any combination of sectors may be
locked to prevent program or erase
operations within those sectors
n
Temporary Sector Unprotect
– Allows changes in locked sectors
(requires high voltage on RESET# pin)
n
Internal Erase Algorithm
– Automatically erases a sector, any
combination of sectors, or the entire chip
n
Internal Programming Algorithm
– Automatically programs and verifies data
at a specified address
n
Fast Program and Erase Times
– Byte programming time: 7 µs typical
– Sector erase time: 1.0 sec typical
– Chip erase time: 7 sec typical
n
Data# Polling and Toggle Status Bits
– Provide software confirmation of
completion of program or erase
operations
n
Minimum 100,000 Program/Erase Cycles
n
Space Efficient Packaging
– Available in industry-standard 32-pin
PDIP, TSOP and PLCC packages
LOGIC DIAGRAM
Preliminary
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