Hitachi SuperH™ RISC engine
SH7709S
Hardware Manual
ADE-602-250B
Rev. 3.0
9/18/2002
Hitachi, Ltd.
Cautions
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patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
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without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.
Preface
This LSI is a microprocessor with the 32-bit SH-3 CPU as its core and peripheral functions
necessary for configuring a user system.
This LSI is built in with a variety of peripheral functions such as cache memory, memory
management unit (MMU), interrupt controller, timer, three serial communication interfaces, real-
time clock (RTC), use break controller (UBC), bus state controller (BSC) and I/O ports.
This LSI can be used as a microcomputer for devices that require both high speed and low power
consumption.
Target Readers:
This manual is designed for use by people who design application systems using
the SH7709S.
To use this manual, basic knowledge of electric circuits, logic circuits and microcomputers is
required.
Purpose:
This manual provides the information of the hardware functions and electrical
characteristics of the SH7709S.
The SH3, SH-3E, SH3-DSP Programming Manual contains detailed information of executable
instructions. Please read the Programming Manual together with this manual.
How to Use the Book:
•
To understand general functions
Read the manual from the beginning.
The manual explains the CPU, system control functions, peripheral functions and electrical
characteristics in that order.
•
To understanding CPU functions
Refer to the separate SH3, SH-3E, SH3-DSP Programming Manual.
Explanatory Note:
Bit sequence: upper bit at left, and lower bit at right
List of Related Documents:
The latest documents are available on our Web site. Please make
sure that you have the latest version.
(http://www.hitachisemiconductor.com/)
•
User manuals for SH7709S
Name of Document
SH7709S Series Hardware Manual
SH3, SH-3E, SH3-DSP Programming Manual
Document No.
This manual
ADE-602-156
Rev. 3.0, 09/02, page iii of xl
•
User manuals for development tools
Name of Document
C/C++ Compiler, Assembler, Optimizing Linkage Editor User’s Manual
Simulator/Debugger User’s Manual
Hitachi Embedded Workshop User’s Manual
Document No.
ADE-702-246
ADE-702-186
ADE-702-201
Rev. 3.0, 09/02, page iv of xl
List of Items Revised or Added for This Version
Section
1.3.2 Pin Function
Table 1.3 SH7709S Pin
Function
Page
9, 17
Description
Note
*6
added, and text added to
*4
Number of Pins
FP-208C
FP-208E
1
2
3
4
5
6
BP-240A
D2
C2
E2
D1
D3
E1
Pin Name
MD1
MD2
Vcc-RTC
*
XTAL2
EXTAL2
Vss-RTC
*
1
1
I/O
I
I
—
O
I
—
Description
Clock mode setting
Clock mode setting
RTC power supply (
*
3
)
On-chip RTC crystal oscillator pin
On-chip RTC crystal oscillator
pin
*
6
RTC power supply (0 V)
*4
*5
*6
When this LSI is used on the user system alone, without an emulator and the H-
UDI, hold this pin at high level. When this pin is low or open,
RESETP
may be
masked (see section 22).
B2, B1, C1, U1, V1, W1, V2, W2, W3, W17, W18, W19, V18, V19, B19, A19,
B18, A18, A17, A3, A2, and A1 are NC pins. Do not connect anything to these
pins.
If EXTAL2 is not used, pull this pin up to the Vcc-RTC level.
3.1.3 SH7709S MMU
Figure 3.2 Virtual
Address Space Mapping
59
H'80000000
Address error
H'FFFFFFFF
User mode
6.2.3 IRL Interrupts
123
Explanation added to 8th line as follows
Correct operation cannot be guaranteed if the level is not maintained.
However, the priority level can be changed to a higher one.
6.2.4 PINT Interrupts
124
Explanation added to 6th line as follows
The PINT0/1 interrupt level should be held until the interrupt is accepted
and interrupt handling is started. Correct operation cannot be guaranteed if
the level is not maintained.
Rev. 3.0, 09/02, page v of xl
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