64Kx16 Bit High-Speed CMOS Static RAM(3.3V Operating)
Operated at Commercial and Industrial Temperature Ranges.
for AT&T
CMOS SRAM
Revision History
Rev. No.
Rev. 0.0
Rev. 0.1
Rev. 0.2
Rev. 1.0
History
Initial document.
Speed bin modify
Current modify
1. Delete 12ns speed bin.
2. Change Icc for Industrial mode.
Item
Previous
8ns
100mA
I
CC(Industrial)
10ns
85mA
1. Add tBA,tBLZ,tBHZ,tBW AC parematers.
1. Correct read cycle timing diagram(2).
1. Add the Lead Free Package type.
Draft Data
May. 11. 2001
June. 18. 2001
September. 9. 2001
December. 18. 2001
Current
90mA
75mA
February. 14. 2002
June. 19. 2002
July. 26, 2004
Final
Final
Final
Remark
Preliminary
Preliminary
Preliminary
Final
Rev. 2.0
Rev. 3.0
Rev. 4.0
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions,
please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev. 4.0
July 2004
K6R1016V1D
1Mb Async. Fast SRAM Ordering Information
Org.
256K x4
Part Number
K6R1004C1D-J(K)C(I) 10
K6R1004V1D-J(K)C(I) 08/10
K6R1008C1D-J(K,T,U)C(I) 10
128K x8
K6R1008V1D-J(K,T,U)C(I) 08/10
K6R1016C1D-J(K,T,U,E)C(I) 10
64K x16 K6R1016V1D-J(K,T,U,E)C(I) 08/10
3.3
5
3.3
8/10
10
8/10
VDD(V)
5
3.3
5
Speed ( ns )
10
8/10
10
PKG
J : 32-SOJ
K: 32-SOJ(LF)
J : 32-SOJ
K : 32-SOJ(LF)
T : 32-TSOP2
U : 32-TSOP2(LF)
J : 44-SOJ
K : 44-SOJ(LF)
T : 44-TSOP2
U : 44-TSOP2(LF)
E : 48-TBGA
for AT&T
CMOS SRAM
Temp. & Power
C : Commercial Temperature
,Normal Power Range
I : Industrial Temperature
,Normal Power Range
-2-
Rev. 4.0
July 2004
K6R1016V1D
FEATURES
• Fast Access Time 8,10ns(Max.)
• Low Power Dissipation
Standby (TTL)
: 20mA(Max.)
(CMOS) : 5mA(Max.)
Operating K6R1016V1D- 08: 80mA(Max.)
K6R1016V1D-10: 65mA(Max.)
• Single 3.3V Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Data Byte Control: LB: I/O
1
~ I/O
8
, UB: I/O
9
~ I/O
16
• Standard Pin Configuration:
K6R1016V1D-J: 44-SOJ-400
K6R1016V1D-K: 44-SOJ-400 (Lead-Free)
K6R1016V1D-T: 44-TSOP2-400BF
K6R1016V1D-U: 44-TSOP2-400BF (Lead-Free)
K6R1016V1D-E: 48-TBGA ( 6.0mm X 7.0mm )
with 0.75mm ball pitch
• Operating in Commercial and Industrial Temperature range.
for AT&T
CMOS SRAM
GENERAL DESCRIPTION
The K6R1016V1D is a 1,048,576-bit high-speed Static Random
Access Memory organized as 65,536 words by 16 bits.
The K6R1016V1D uses 16 common input and output lines and
has at output enable pin which operates faster than address
access time at read cycle. Also it allows that lower and upper
byte access by data byte control (UB, LB). The device is
fabricated using SAMSUNG′s advanced CMOS process and
designed for high-speed circuit technology. It is particularly well
suited for use in high-density high-speed system applications.
The K6R1016V1D is packaged in a 400mil 44-pin plastic SOJ
or TSOP2 forward or 48-TBGA.
64K x 16 Bit High-Speed CMOS Static RAM(3.3V Operating)
FUNCTIONAL BLOCK DIAGRAM
Clk Gen.
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
I/O
1
~I/O
8
I/O
9
~I/O
16
Pre-Charge Circuit
Row Select
Memory Array
512 Rows
128x16 Columns
PIN FUNCTION
Data
Cont.
Data
Cont.
Gen.
CLK
A
9
A
10
A
11
A
12
A
13
A
14
A
15
I/O Circuit &
Column Select
Pin Name
A
0
- A
15
WE
CS
OE
LB
UB
I/O
1
~ I/O
16
Write Enable
Chip Select
Pin Function
Address Inputs
Output Enable
Lower-byte Control(I/O
1
~I/O
8
)
Upper-byte Control(I/O
9
~I/O
16
)
Data Inputs/Outputs
Power(+3.3V)
Ground
No Connection
WE
OE
UB
LB
CS
V
CC
V
SS
N.C
-3-
Rev. 4.0
July 2004
K6R1016V1D
PIN CONFIGURATION(TOP
VIEW)
1
2
3
for AT&T
CMOS SRAM
4
5
6
A
0
A
1
A
2
A
3
A
4
CS
I/O
1
I/O
2
I/O
3
1
2
3
4
5
6
7
8
9
44 A
15
43 A
14
42 A
13
41 OE
40 UB
39 LB
38 I/O
16
37 I/O
15
36 I/O
14
D
Vss
I/O4
N.C
A7
I/O12
Vcc
B
I/O1
UB
A3
A4
CS
I/O9
A
LB
OE
A0
A1
A2
N.C
C
I/O2
I/O3
A5
A6
I/O11
I/O10
I/O
4
10
Vcc 11
Vss 12
I/O
5
13
I/O
6
14
I/O
7
15
I/O
8
16
WE 17
A
5
18
A
6
19
A
7
20
A
8
21
N.C 22
SOJ/
TSOP2
35 I/O
13
34 Vss
33 Vcc
32 I/O
12
31 I/O
11
30 I/O
10
29 I/O
9
28 N.C
27 A
12
26 A
11
25 A
10
24 A
9
23 N.C
H
N.C
A8
A9
A10
A11
N.C
F
I/O7
I/O6
A14
A15
I/O14
I/O15
E
Vcc
I/O5
N.C
N.C
I/O13
Vss
G
I/O8
N.C
A12
A13
WE
I/O16
48-TBGA
( Top View )
ABSOLUTE MAXIMUM RATINGS*
Parameter
Voltage on Any Pin Relative to V
SS
Voltage on V
CC
Supply Relative to V
SS
Power Dissipation
Storage Temperature
Operating Temperature
Commercial
Industrial
Symbol
V
IN
, V
OUT
V
CC
P
d
T
STG
T
A
T
A
Rating
-0.5 to 4.6
-0.5 to 4.6
1
-65 to 150
0 to 70
-40 to 85
Unit
V
V
W
°C
°C
°C
*
Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(T
A
= 0 to 70°C)
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min
3.0
0
2.0
-0.3
(2)
Typ
3.3
0
-
-
Max
3.6
0
V
CC
+0.3
(1)
0.8
Unit
V
V
V
V
(1) V
IH
(Max) = V
CC +
2.0V a.c(Pulse Width
≤
8ns) for I
≤
20mA
(2) V
IL
(Min) = -2.0V a.c(Pulse Width
≤
8ns) for I
≤
20mA.
-4-
Rev. 4.0
July 2004
K6R1016V1D
Parameter
Input Leakage Current
Output Leakage Current
Operating Current
Symbol
I
LI
I
LO
I
CC
V
IN
=V
SS
to V
CC
CS=V
IH
or OE=V
IH
or WE=V
IL
V
OUT
=V
SS
to V
CC
Min. Cycle, 100% Duty
CS=V
IL,
V
IN
=V
IH
or V
IL,
I
OUT
=0mA
Com.
Ind.
Standby Current
I
SB
I
SB1
Output Low Voltage Level
Output High Voltage Level
V
OL
V
OH
Min. Cycle, CS=V
IH
f=0MHz, CS≥V
CC
-0.2V,
V
IN
≥V
CC
-0.2V or V
IN
≤0.2V
I
OL
=8mA
I
OH
=-4mA
8ns
10ns
8ns
10ns
Test Conditions
for AT&T
CMOS SRAM
Min
-2
-2
-
-
-
-
-
-
-
2.4
Max
2
2
80
65
90
75
20
5
0.4
-
V
V
mA
Unit
µA
µA
mA
DC AND OPERATING CHARACTERISTICS*
(T
A
=0 to 70°C, Vcc=3.3±0.3V, unless otherwise specified)
* The above parameters are also guaranteed at industrial temperature range.
CAPACITANCE*
(T
A
=25°C, f=1.0MHz)
Item
Input/Output Capacitance
Input Capacitance
* Capacitance is sampled and not 100% tested.
Symbol
C
I/O
C
IN
Test Conditions
V
I/O
=0V
V
IN
=0V
TYP
-
-
Max
8
6
Unit
pF
pF
AC CHARACTERISTICS
(T
A
=0 to 70°C, Vcc=3.3V+0.3V/-0.15V, unless otherwise noted.)
TEST CONDITIONS*
Parameter
Input Pulse Levels
Input Rise and Fall Times
Input and Output timing Reference Levels
Output Loads
* The above test conditions are also applied at industrial temperature range.
Value
0V to 3V
3ns
1.5V
See below
Output Loads(A)
Output Loads(B)
for t
HZ
, t
LZ
, t
WHZ
, t
OW
, t
OLZ
& t
OHZ
R
L
= 50Ω
+3.3V
D
OUT
V
L
= 1.5V
Z
O
= 50Ω
30pF*
D
OUT
319Ω
353
Ω
5pF*
* Capacitive Load consists of all components of the
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