Data Sheet
PT7C4511
PLL Clock Multiplier
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Features
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Zero ppm multiplication error
Description
The PT7C4511 is a high performance frequency
multiplier, which integrates Analog Phase Lock Loop
techniques.
The PT7C4511 is the most cost effective way to
generate a high quality, high frequency clock output
from a lower frequency crystal or clock input. It is
designed to replace crystal oscillators in most electronic
systems, clock multiplier and frequency translation.
Using Phase-Locked-Loop (PLL) techniques, the device
uses a standard fundamental mode, inexpensive crystal
to produce output clocks up to 200 MHz.
The complex Logic divider is the ability to generate nine
different popular multiplication factors, allowing one
chip to output many common frequencies.
The device also has an Output Enable pin that tri-states
Input crystal frequency of 5 - 30 MHz
Input clock frequency of 1 - 50 MHz
Output clock frequencies up to 200 MHz
Peak to Peak Jitter less than 200ps over 200ns
interval (100~200MHz)
Low period jitter 50ps (100~200MHz)
Duty cycle of 45/55%
9 selectable frequencies controlled by S0, S1 pins
Operating voltages of 3.0 to 5.5V
Tri-state output for board level testing
Lead free SOIC-8 package
Ordering Information
Part No.
PT7C4511WE
Package
Lead free and Green 8-pin
SOIC
the clock output when the OE pin is taken low. This
product is intended for clock generation and frequency
translation with low output jitter (variation in the output
period).
Block Diagram
OE
S0
S1
PLL Clock Synthesis
and
Control Circuit
Output
Buffer
CLK
X1/ICLK
X2
Crystal
Oscillator
V
CC
GND
PT0138(03/09)
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Ver:2
Data Sheet
PT7C4511
PLL Clock Multiplier
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Pin Configuration
1
2
3
4
X1/ICLK
Vcc
GND
S1
X2
OE
S0
CLK
8
7
6
5
Pin Description
Name
X1/ICLK
Vcc
GND
S1
CLK
S0
OE
X2
Pin No.
1
2
3
4
5
6
7
8
Type
X1
P
P
T1
O
T1
I
XO
Crystal connection or clock input.
Connect to +3.3V or +5V.
Connect to ground.
Multiplier select pin, connect to GND or Vcc or floating (no connection).
Clock output per Table below.
Multiplier select pin 0, connect to GND or Vcc or floating (no connection).
Output enable, tri-state CLK output when low. Internal pull-up.
Crystal connection. Leave unconnected for clock input.
Description
Clock Output Table
S1
S0
CLK
0
0
×4
0
M
×(16/3)
0
1
×5
M
0
×2.5
M
M
×2
M
1
×(10/3)
1
0
×6
1
M
×3
1
1
×8
1)
Note:
CLK output frequency=ICLK×4.
2)
Note:
M=Leave unconnected (self-biases to Vcc/2).
PT0138(03/09)
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Ver:2
Data Sheet
PT7C4511
PLL Clock Multiplier
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Maximum Ratings
Storage Temperature......................................................................................-65oC to +150oC
Ambient Operating Temperature..................................................................-40oC to +85oC
Supply Voltage to Ground Potential (V
CC
)..................................................-0.3V to + 7.0V
Inputs(Referenced to GND)....................................................................-0.5V to Vcc + 0.5V
Clock Output(Referenced to GND) .....................................................-0.5V to Vcc + 0.5V
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
Recommended operation conditions
Symbol
T
A
V
CC
Description
Operation Temperature
Min
-40
Type
-
Max
+85
Unit
°C
Supply voltage
3.0
-
5.5
V
DC Electrical Characteristics
(V
CC
= 3.3V±0.3V, T
A
= -40 ~ 85ºC, unless otherwise noted)
Sym.
Vcc
Icc
V
IH
Parameter
Supply Voltage
Supply Current
Input Logic High
-
no load, 20MHz crystal
-
Test Condition
Pin
Vcc
Vcc
ICLK
OE
Input Logic Low
Input Logic High
Input mid-level
Input Logic Low
High-level output voltage
Low-level output voltage
Internal pull up resistance
Short Circuit Current
-
-
-
-
I
OH
= -12mA
I
OL
= 12mA
-
-
ICLK
OE
V
IH
V
IM
V
IL
V
OH
V
OL
R
I
S
S0, S1
S0, S1
S0, S1
CLK
CLK
OE
CLK
Min.
3
-
(Vcc/2)+1
2
-
-
Vcc-0.5
-
-
2.4
-
-
-
Typ.
-
12
Vcc/2
-
Vcc/2
-
-
Vcc/2
-
-
-
270
±70
Max.
5.5
20
-
-
(Vcc/2)-
1
0.8
-
-
0.5
-
0.4
-
-
Unit
V
mA
V
V
V
V
V
V
V
V
V
kΩ
mA
V
IL
PT0138(03/09)
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Ver:2
Data Sheet
PT7C4511
PLL Clock Multiplier
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AC Electrical Characteristics
(V
CC
= 3.3V±0.3V, T
A
= -40 ~ 85ºC, unless otherwise noted)
Sym.
f
IN
f
OUT
t
r
t
f
Duty
Parameter
Input Frequency
Output Frequency
Output clock rise time
Output clock fall time
Output clock duty cycle
PLL bandwidth
Output enable time
Output disable time
Period Jitter
Jitter over 200ns interval
-
Vcc: 4.5 to 5.5V
Vcc: 3.0 to 3.6V
0.8 to 2.0V
2.0 to 0.8V
At Vcc/2
-
OE high to output on
OE low to tri-rise
100MHz~200MHz
-100MHz~200MHz
Test Condition
Pin
ICLK
CLK
CLK
CLK
CLK
CLK
-
-
-
CLK
CLK
Min.
1
20
20
-
-
45
10
-
-
-
-
Typ.
-
-
-
1
1
50
-
-
-
50
-
Max.
50
200
180
-
-
55
-
50
50
100
200
Unit
MHz
MHz
MHz
ns
ns
%
kHz
ns
ns
ps
ps
Mechanical Information
WE (8-pin SOIC)
8
.149 3.78
.157 3.99
.0099 0.25
x 45
o
.0196 0.50
0-8
o
0.40 .016
1.27 .050
.2284
.2440
5.80
6.20
.0075 0.19
.0098 0.25
1
.189 4.80
.196 5.00
.016
.026
0.406
0.660
REF
.050
BSC
1.27
.053 1.35
.068 1.75
SEATING PLANE
.0040 0.10
.0098 0.25
.013 0.330
.020 0.508
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
Note:
1) Controlling dimensions in millimeters.
2) Ref: JEDEC MS-012 AA
PT0138(03/09)
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Ver:2
Data Sheet
PT7C4511
PLL Clock Multiplier
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Notes
Email: support@pti.com.cn
China:
Web Site: www.pti.com.cn, www.pti-ic.com
No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, China
Tel: (86)-21-6485 0576
Fax: (86)-21-6485 2181
Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong
Tel: (852)-2243 3660
Fax: (852)- 2243 3667
3545 North First Street, San Jose, California 95134, USA
Tel: (1)-408-435 0800
Fax: (1)-408-435 1100
Asia Pacific:
U.S.A.:
Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or
performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any circuitry described other than the
circuitry embodied in Pericom Technology product. The company makes no representations that circuitry described herein is free from patent infringement or other
rights, of Pericom Technology Incorporation.
PT0138(03/09)
5
Ver:2
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