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X9409YS24I-2.7

Description
Quad Digitally Controlled Potentiometers
Categoryaccessories   
File Size771KB,19 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
Download Datasheet View All

X9409YS24I-2.7 Overview

Quad Digitally Controlled Potentiometers

X9409
OBSOLETE PRODUCT
NO RECOMMENDED REPLACEMENT
contact our Technical Support Center at
1-888-INTERSIL or www.intersil.com/tsc
DATASHEET
FN8192
Rev.6.00
Sep 3, 2015
Low Noise/Low Power/2-Wire Bus Quad Digitally Controlled Potentiometers
(XDCP)
The
X9409
integrates 4 digitally controlled potentiometers
(XDCP) on a monolithic CMOS integrated microcircuit.
The digitally controlled potentiometer is implemented using
63 resistive elements in a series array. Between each element
are tap points connected to the wiper terminal through
switches. The position of the wiper on the array is controlled by
the user through the 2-wire bus interface. Each potentiometer
has associated with it a volatile Wiper Counter Register (WCR)
and 4 nonvolatile Data Registers (DR0:DR3) that can be
directly written to and read by the user. The contents of the
WCR controls the position of the wiper on the resistor array
through the switches. Power-up recalls the contents of DR0 to
the WCR.
The XDCP can be used as a three-terminal potentiometer or as
a two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments and
signal processing.
Features
• Four potentiometers per package
• 64 resistor taps
• 2-wire serial interface for write, read and transfer operations
of the potentiometer
• 50Ω wiper resistance, typical at 5V
• Four nonvolatile data registers for each potentiometer
• Nonvolatile storage of multiple wiper position
• Power-on recall. Loads saved wiper position on power-up
standby current < 1µA typical
• System V
CC
: 2.7V operation
• 10kΩ end-to-end resistance
• 100 year data retention
• Endurance: 100,000 data changes per bit per register
• Low power CMOS
• 24 Ld TSSOP
• Pb-free (RoHS compliant)
V
CC
V
SS
R
0
R
1
POT 0
WIPER
COUNTER
REGISTER
(WCR)
V
H0
/R
HO
R
0
R
1
WIPER
COUNTER
REGISTER
(WCR)
V
H2
/R
H2
WP
SCL
SDA
A0
A1
A2
A3
INTERFACE
AND
CONTROL
CIRCUITRY
DATA
R
2
R
3
V
L0
/
R
LO
V
W0
/
R
WO
RESISTOR
ARRAY
POT 2
R
2
R
3
V
L2
/R
L2
V
W2
/R
W2
8
V
W1
/
R
W1
R
0
R
1
WIPER
COUNTER
REGISTER
(WCR)
RESISTOR
ARRAY
POT 1
V
H1
/
R
H1
R
0
R
1
WIPER
COUNTER
REGISTER
(WCR)
V
W3
/R
W3
V
H3
/R
H3
R
2
R
3
V
L1
/R
L1
R
2
R
3
RESISTOR
ARRAY
Pot 3
V
L3
/R
L3
FIGURE 1. BLOCK DIAGRAM
FN8192 Rev.6.00
Sep 3, 2015
Page 1 of 19
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