DC CHARACTERISTICS RHEOSTAT MODE (Specifications Apply to All VRs)
R-DNL
R
WB
, V
A
= NC
Resistor Differential NL
2
2
Resistor Nonlinearity
R-INL
R
WB
, V
A
= NC
Nominal Resistor Tolerance
∆R
V
AB
= V
DD
, Wiper = No Connect, T
A
= 25°C
Resistance Temperature Coefficient
R
AB
/∆T
V
AB
= V
DD
, Wiper = No Connect
Wiper Resistance
3
R
W
I
W
= V
DD
/R, V
DD
= 3 V or 5 V
Nominal Resistance Match
∆R/R
O
CH 1 to 2, V
AB
= V
DD
, T
A
= 25°C
DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE (Specifications Apply to All VRs)
Resolution
N
4
INL
R
AB
= 10 kΩ, 50 kΩ, or 100 kΩ
Integral Nonlinearity
INL
R
AB
= 1 MΩ
Differential Nonlinearity
4
DNL
Voltage Divider Temperature Coefficient
∆V
W
/∆T
Code = 40
H
Full-Scale Error
V
WFSE
Code = 7F
H
Zero-Scale Error
V
WZSE
Code = 00
H
RESISTOR TERMINALS
Voltage Range
5
Capacitance
6
A, B
Capacitance
6
W
Common-Mode Leakage
DIGITAL INPUTS AND OUTPUTS
Input Logic High
Input Logic Low
Input Current
Input Capacitance
6
POWER SUPPLIES
Power Single-Supply Range
Power Dual-Supply Range
Positive Supply Current
Negative Supply Current
Power Dissipation
7
Power Supply Sensitivity
DYNAMIC CHARACTERISTICS
6, 8, 9
Bandwidth –3 dB
V
A, B, W
C
A, B
C
W
I
CM
V
IH
V
IL
I
IL
C
IL
V
DD RANGE
V
DD/SS RANGE
I
DD
I
SS
P
DISS
PSS
BW_10K
BW_50K
BW_100K
BW_1M
THD
W
t
S
e
N_WB
7
–1
–2
–1
–1
0
V
SS
±
1/4
±
1/2
±
1/4
20
–0.5
0.5
+1
+2
+1
+0
1
V
DD
f = 1 MHz, Measured to GND, Code = 40
H
f = 1 MHz, Measured to GND, Code = 40
H
V
A
= V
B
= V
W
V
DD
= 5 V/3 V
V
DD
= 5 V/3 V
V
IN
= 0 V or 5 V
2.4/2.1
45
60
1
5
V
SS
= 0 V
V
IH
= 5 V or V
IL
= 0 V
V
SS
= –2.5 V, V
DD
= +2.7 V
V
IH
= 5 V or V
IL
= 0 V, V
DD
= 5 V
2.7
±
2.3
V
0.8/0.6 V
±
1
µA
pF
V
V
µA
µA
µW
%/%
kHz
kHz
kHz
kHz
%
µs
nV√Hz
ns
ns
ns
ns
ns
ns
ns
ns
ns
5.5
±
2.7
15
40
15
40
150 400
0.002 0.05
1000
180
78
7
0.005
2
14
Total Harmonic Distortion
V
W
Settling Time
Resistor Noise Voltage
R
AB
= 10 kΩ, Code = 40
H
R
AB
= 50 kΩ, Code = 40
H
R
AB
= 100 kΩ, Code = 40
H
R
AB
= 500 kΩ, Code = 40
H
V
A
= 1 V rms + 2 V dc, V
B
= 2 V dc, f = 1 kHz
R
AB
= 10 kΩ,
±
1 LSB Error Band
R
WB
= 5 kΩ, f = 1 kHz
30
20
20
10
30
20
30
20
40
INTERFACE TIMING CHARACTERISTICS (Applies to All Parts)
6, 10
Input Clock Pulsewidth
t
CH
, t
CL
Clock Level High or Low
CS
to CLK Setup Time
t
CSS
CS
Rise to CLK Hold Time
t
CSH
U/D to Clock Fall Setup Time
t
UDS
U/D to Clock Fall Hold Time
t
UDH
DACSEL to Clock Fall Setup Time
t
DSS
DACSEL to Clock Fall Hold Time
t
DSH
MODE to Clock Fall Setup Time
t
MDS
MODE to Clock Fall Hold Time
t
MDH
NOTES
1
Typicals represent average readings at 25°C, V
DD
= 5 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions.
R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See Figure 22 test circuit.
3
Wiper resistance is not measured on the R
AB
= 1 MΩ models.
4
INL and DNL are measured at V with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V = V
W
A
DD
and V
B
= 0 V. DNL
specification limits of
±1
LSB maximum are guaranteed monotonic operating conditions. See Figure 21 test circuit.
5
Resistor Terminals A, B, W have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test.
7
P
DISS
is calculated from (I
DD
×
V
DD
). CMOS logic level inputs result in minimum power dissipation.
8
Bandwidth, noise and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest bandwidth.
The highest R value results in the minimum overall power consumption.
9
All dynamic characteristics use V
DD
= 5 V.
10
See timing diagram for location of measured values. All input control voltages are specified with t = t = 2.5 ns (10% to 90% of +3 V) and timed from a voltage level
R
F
of 1.5 V. Switching characteristics are measured using both V
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