DC CHARACTERISTICS RHEOSTAT MODE (Specifications Apply to All VRs)
Resistor Differential NL
2
R-DNL
R
WB
, V
A
= NC
2
Resistor Nonlinearity
R-INL
R
WB
, V
A
= NC
Nominal Resistor Tolerance
∆R
T
A
= +25°C
Resistance Temperature Coefficient
R
AB
/∆T
V
AB
= V
DD
, Wiper = No Connect
Wiper Resistance
R
W
I
W
=
±
15 V/R
NOMINAL
Wiper Resistance
R
W
I
W
=
±
5 V/R
NOMINAL
DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE (Specifications Apply to All VRs)
Resolution
N
3
Integral Nonlinearity
INL
Differential Nonlinearity
3
DNL
Voltage Divider Temperature Coefficient
∆V
W
/∆T
Code = 40
H
Full-Scale Error
V
WFSE
Code = 7F
H
Zero-Scale Error
V
WZSE
Code = 00
H
RESISTOR TERMINALS
Voltage Range
4
Capacitance
5
A, B
Capacitance
5
W
Shutdown Supply Current
6
Shutdown Wiper Resistance
Common-Mode Leakage
DIGITAL INPUTS AND OUTPUTS
Input Logic High
Input Logic Low
Output Logic High
Output Logic Low
7
Input Current
Input Capacitance
5
POWER SUPPLIES
Power Supply Range
Power Supply Range
Supply Current
Supply Current
Supply Current
Power Dissipation
8
Power Supply Sensitivity
DYNAMIC CHARACTERISTICS
5, 9, 10
Bandwidth –3 dB
Bandwidth –3 dB
Bandwidth –3 dB
Total Harmonic Distortion
V
W
Settling Time
Resistor Noise Voltage
V
A, B, W
C
A, B
C
W
I
A_SD
R
W_SD
I
CM
V
IH
V
IL
V
OH
V
OL
I
IL
C
IL
V
DD
/V
SS
V
DD
I
DD
I
DD
I
SS
P
DISS
PSS
PSS
BW_10K
BW_50K
BW_100K
THD
W
t
S
e
N_WB
±
0.5
±
0.1
5
–0.5
+0.5
+1
+1
+0
+1
V
DD
f = 1 MHz, Measured to GND, Code = 40
H
f = 1 MHz, Measured to GND, Code = 40
H
V
A
= V
DD
, V
B
= 0 V, SHDN = 0
V
A
= V
DD
, V
B
= 0 V, SHDN = 0, V
DD
= +15 V
V
A
= V
B
= V
W
V
DD
= +5 V or +15 V
V
DD
= +5 V or +15 V
R
L
= 2.2 kΩ to +5 V
I
OL
= 1.6 mA, V
LOGIC
= +5 V, V
DD
= +15 V
V
IN
= 0 V or +15 V
2.4
45
60
0.01
170
1
1
400
0.8
4.9
0.4
±
1
5
Dual Supply Range
Single Supply Range, V
SS
= 0
V
IH
= +5 V or V
IL
= 0 V, V
DD
= +5 V
V
IH
= +5 V or V
IL
= 0 V, V
DD
= +15 V
V
IH
= +5 V or V
IL
= 0 V, V
SS
= –5 V or –15 V
V
IH
= +5 V or V
IL
= 0 V, V
DD
= +15 V, V
SS
= –15 V
∆V
DD
= +5 V
±
10%, or
∆V
SS
= –5 V
±
10%
∆V
DD
= +15 V
±
10% or
∆V
SS
= –15 V
±
10%
R
AB
= 10 kΩ, Code = 40
H
R
AB
= 50 kΩ, Code = 40
H
R
AB
= 100 kΩ, Code = 40
H
V
A
= 1 V rms, V
B
= 0 V, f = 1 kHz
V
A
= 10 V, V
B
= 0 V,
±
1 LSB Error Band
R
WB
= 25 kΩ, f = 1 kHz,
RS
= 0
±
4.5
4.5
±
16.5
28
0.0001 0.01
0.75
2
0.02
0.1
11
30
0.05
0.15
0.01
0.02
520
125
60
0.005
4
14
INTERFACE TIMING CHARACTERISTICS (Applies to All Parts [Notes 5, 11])
Input Clock Pulsewidth
t
CH
, t
CL
Clock Level High or Low
Data Setup Time
t
DS
Data Hold Time
t
DH
12
CLK to SDO Propagation Delay
t
PD
R
L
= 2.2 kΩ, C
L
< 20 pF
CS
Setup Time
t
CSS
CS
High Pulsewidth
t
CSW
Reset Pulsewidth
t
RS
CLK Rise to
CS
Rise Hold Time
t
CSH
CS
Rise to Clock Rise Setup
t
CS1
120
30
20
10
120
150
120
120
120
100
–2–
REV. 0
AD7376
NOTES
11
Typicals represent average readings at +25°C, V
DD
= +15 V, and V
SS
= –15 V.
12
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi-
tions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See Figure 27. Test Circuit.
13
INL and DNL are measured at V
W
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
A
= V
DD
and V
B
= 0 V. DNL
specification limits of
±
1 LSB maximum are Guaranteed Monotonic operating conditions. See Figure 26. Test Circuit.
14
Resistor terminals A, B, W have no limitations on polarity with respect to each other.
15
Guaranteed by design and not subject to production test.
16
Measured at the A terminal. A terminal is open circuit in shutdown mode.
17
I
OL
= 200
µA
for the 50 kΩ version operating at V
DD
= +5 V.
18
P
DISS
is calculated from (I
DD
×
V
DD
). CMOS logic level inputs result in minimum power dissipation.
19
Bandwidth, noise and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest band-
width. The highest R value results in the minimum overall power consumption.
10
All dynamic characteristics use V
DD
= +15 V and V
SS
= –15 V.
11
See timing diagram for location of measured values. All input control voltages are specified with t
R
= t
F
= 1 ns (10% to 90% of V
DD
) and timed from a voltage level
of 1.6 V. Switching characteristics are measured using both V
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