Dual-Core Intel® Xeon®
Processor 5000 Series
Datasheet
May 2006
Document Number: 313079-001
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,
BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS
PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER,
AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING
LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY
PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or
life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel
reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future
changes to them.
The Dual-Core Intel® Xeon® Processor 5000 Series may contain design defects or errors known as errata which may cause the
product to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Intel, Pentium, Intel Xeon, Intel SpeedStep, Intel NetBurst, Intel Architecture, Intel Virtualization Technology, and the Intel logo
are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2004-2006, Intel Corporation.
2
Dual-Core Intel® Xeon® Processor 5000 Series Datasheet
Contents
1
Introduction................................................................................................................. 9
1.1
Terminology ..................................................................................................... 11
1.2
State of Data .................................................................................................... 12
1.3
References ....................................................................................................... 12
Electrical Specifications ............................................................................................... 15
2.1
Front Side Bus and GTLREF ................................................................................ 15
2.2
Power and Ground Lands.................................................................................... 15
2.3
Decoupling Guidelines ........................................................................................ 16
2.3.1 VCC Decoupling...................................................................................... 16
2.3.2 VTT Decoupling ...................................................................................... 16
2.3.3 Front Side Bus AGTL+ Decoupling ............................................................ 16
2.4
Front Side Bus Clock (BCLK[1:0]) and Processor Clocking ....................................... 16
2.4.1 Front Side Bus Frequency Select Signals (BSEL[2:0]) .................................. 17
2.4.2 Phase Lock Loop (PLL) and Filter .............................................................. 18
2.5
Voltage Identification (VID) ................................................................................ 19
2.6
Reserved or Unused Signals................................................................................ 21
2.7
Front Side Bus Signal Groups .............................................................................. 21
2.8
GTL+ Asynchronous and AGTL+ Asynchronous Signals ........................................... 23
2.9
Test Access Port (TAP) Connection....................................................................... 23
2.10 Mixing Processors.............................................................................................. 24
2.11 Absolute Maximum and Minimum Ratings ............................................................. 24
2.12 Processor DC Specifications ................................................................................ 25
2.12.1 VCC Overshoot Specification .................................................................... 31
2.12.2 Die Voltage Validation ............................................................................. 32
Mechanical Specifications............................................................................................. 33
3.1
Package Mechanical Drawings ............................................................................. 33
3.2
Processor Component Keepout Zones................................................................... 37
3.3
Package Loading Specifications ........................................................................... 37
3.4
Package Handling Guidelines............................................................................... 38
3.5
Package Insertion Specifications.......................................................................... 38
3.6
Processor Mass Specifications ............................................................................. 38
3.7
Processor Materials............................................................................................ 38
3.8
Processor Markings............................................................................................ 39
3.9
Processor Land Coordinates ................................................................................ 40
Land Listing ............................................................................................................... 43
4.1
Dual-Core Intel Xeon Processor 5000 Series Land Assignments ............................... 43
4.1.1 Land Listing by Land Name ...................................................................... 43
4.1.2 Land Listing by Land Number ................................................................... 52
Signal Definitions ...................................................................................................... 61
5.1
Signal Definitions .............................................................................................. 61
Thermal Specifications ................................................................................................ 69
6.1
Package Thermal Specifications ........................................................................... 69
6.1.1 Thermal Specifications ............................................................................ 69
6.1.2 Thermal Metrology ................................................................................. 75
6.2
Processor Thermal Features ................................................................................ 77
6.2.1 Thermal Monitor..................................................................................... 77
6.2.2 On-Demand Mode .................................................................................. 77
6.2.3 PROCHOT# Signal .................................................................................. 78
6.2.4 FORCEPR# Signal................................................................................... 78
6.2.5 THERMTRIP# Signal ............................................................................... 78
2
3
4
5
6
Dual-Core Intel® Xeon® Processor 5000 Series Datasheet
3
6.2.6
6.2.7
7
Tcontrol and Fan Speed Reduction ............................................................79
Thermal Diode........................................................................................79
Features ....................................................................................................................83
7.1
Power-On Configuration Options ..........................................................................83
7.2
Clock Control and Low Power States .....................................................................83
7.2.1 Normal State .........................................................................................84
7.2.2 HALT or Enhanced Powerdown States ........................................................84
7.2.3 Stop-Grant State ....................................................................................85
7.2.4 Enhanced HALT Snoop or HALT Snoop State,
Stop Grant Snoop State...........................................................................86
7.3
Enhanced Intel SpeedStep® Technology ...............................................................86
Boxed Processor Specifications .....................................................................................89
8.1
Introduction ......................................................................................................89
8.2
Mechanical Specifications ....................................................................................90
8.2.1 Boxed Processor Heat Sink Dimensions (CEK).............................................91
8.2.2 Boxed Processor Heat Sink Weight ............................................................99
8.2.3 Boxed Processor Retention Mechanism and
Heat Sink Support (CEK) .........................................................................99
8.3
Electrical Requirements ......................................................................................99
8.3.1 Fan Power Supply (Active CEK).................................................................99
8.3.2 Boxed Processor Cooling Requirements.................................................... 100
8.4
Boxed Processor Contents................................................................................. 101
Debug Tools Specifications ......................................................................................... 103
9.1
Debug Port System Requirements ...................................................................... 103
9.2
Target System Implementation.......................................................................... 103
9.2.1 System Implementation......................................................................... 103
9.3
Logic Analyzer Interface (LAI) .......................................................................... 103
9.3.1 Mechanical Considerations ..................................................................... 104
9.3.2 Electrical Considerations ........................................................................ 104
2-1
2-2
2-3
2-4
2-5
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
6-1
6-2
6-3
6-4
7-1
Phase Lock Loop (PLL) Filter Requirements............................................................18
Dual-Core Intel® Xeon® Processor 5000 Series (1066 MHz)
Load Current versus Time ...................................................................................27
Dual-Core Intel® Xeon® Processor 5000 Series (667 MHz) and
Dual-Core Intel® Xeon® Processor 5063 (MV) Load Current versus Time..................28
VCC Static and Transient Tolerance Load Lines ......................................................29
VCC Overshoot Example Waveform ......................................................................32
Processor Package Assembly Sketch.....................................................................33
Processor Package Drawing (Sheet 1 of 3) ............................................................34
Processor Package Drawing (Sheet 2 of 3) ............................................................35
Processor Package Drawing (Sheet 3 of 3) ............................................................36
Dual-Core Intel Xeon Processor 5000 Series Top-side Markings................................39
Dual-Core Intel Xeon Processor 5063 (MV) Top-side Markings..................................39
Processor Land Coordinates, Top View ..................................................................40
Processor Land Coordinates, Bottom View .............................................................41
Dual-Core Intel Xeon Processor 5000 Series (1066 MHz)
Thermal Profiles A and B.....................................................................................71
Dual-Core Intel Xeon Processor 5000 Series (667 MHz) Thermal Profiles ...................73
Dual-Core Intel Xeon Processor 5063 (MV) Thermal Profile ......................................75
Case Temperature (TCASE) Measurement Location.................................................76
Stop Clock State Machine....................................................................................85
8
9
Figures
4
Dual-Core Intel® Xeon® Processor 5000 Series Datasheet
8-1
Boxed Dual-Core Intel Xeon Processor 5000 Series 1U
Passive/2U Active Combination Heat Sink (With Removable Fan) ............................. 89
8-2
Boxed Dual-Core Intel Xeon Processor 5000 Series 2U Passive Heat Sink .................. 90
8-3
2U Passive Dual-Core Intel Xeon Processor 5000 Series
Thermal Solution (Exploded View) ....................................................................... 90
8-4
Top Side Board Keep-Out Zones (Part 1) .............................................................. 92
8-5
Top Side Board Keep-Out Zones (Part 2) .............................................................. 93
8-6
Bottom Side Board Keep-Out Zones ..................................................................... 94
8-7
Board Mounting Hole Keep-Out Zones .................................................................. 95
8-8
Volumetric Height Keep-Ins ................................................................................ 96
8-9
4-Pin Fan Cable Connector (For Active CEK Heat Sink) ........................................... 97
8-10 4-Pin Base Board Fan Header (For Active CEK Heat Sink)........................................ 98
8-11 Fan Cable Connector Pin Out for 4-Pin Active CEK Thermal Solution ....................... 100
Tables
1-1
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
3-1
3-2
3-3
4-1
4-2
5-1
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
6-10
6-11
6-12
Dual-Core Intel® Xeon® Processor 5000 Series Features ....................................... 10
Core Frequency to FSB Multiplier Configuration ..................................................... 17
BSEL[2:0] Frequency Table ................................................................................ 17
Voltage Identification Definition........................................................................... 19
Loadline Selection Truth Table for LL_ID[1:0] ....................................................... 20
Market Segment Selection Truth Table for MS_ID[1:0] ........................................... 20
FSB Signal Groups............................................................................................. 22
Signal Description Table ..................................................................................... 23
Signal Reference Voltages .................................................................................. 23
Processor Absolute Maximum Ratings................................................................... 24
Voltage and Current Specifications....................................................................... 25
VCC Static and Transient Tolerance ..................................................................... 28
BSEL[2:0], VID[5:0] Signal Group DC Specifications .............................................. 30
AGTL+ Signal Group DC Specifications ................................................................. 30
PWRGOOD Input and TAP Signal Group DC Specifications ....................................... 30
GTL+ Asynchronous and AGTL+ Asynchronous Signal Group
DC Specifications .............................................................................................. 31
VTTPWRGD DC Specifications.............................................................................. 31
VCC Overshoot Specifications.............................................................................. 32
Package Loading Specifications ........................................................................... 37
Package Handling Guidelines............................................................................... 38
Processor Materials............................................................................................ 38
Land Listing by Land Name ................................................................................. 43
Land Listing by Land Number .............................................................................. 52
Signal Definitions .............................................................................................. 61
Dual-Core Intel Xeon Processor 5000 Series (1066 MHz) Thermal Specifications ........ 70
Dual-Core Intel Xeon Processor 5000 Series (1066 MHz) Thermal Profile A Table ....... 71
Dual-Core Intel Xeon Processor 5000 Series (1066 MHz) Thermal Profile B Table ....... 72
Dual-Core Intel Xeon Processor 5000 Series (667 MHz) Thermal Specifications .......... 72
Dual-Core Intel Xeon Processor 5000 Series (667 MHz) Thermal Profile A Table ......... 73
Dual-Core Intel Xeon 5000 Series (667 MHz) Thermal Profile B Table ....................... 74
Dual-Core Intel Xeon Processor 5063 (MV) Thermal Specifications ........................... 74
Dual-Core Intel Xeon Processor 5063 (MV) Thermal Profile Table ............................. 75
Thermal Diode Parameters using Diode Model ....................................................... 80
Thermal Diode Interface..................................................................................... 81
Thermal Diode Parameters using Transistor Model ................................................. 81
Parameters for Tdiode Correction Factor ............................................................... 81
Dual-Core Intel® Xeon® Processor 5000 Series Datasheet
5
stm32/stm8
京公网安备 11010802033920号
EEWORLD
