Intel
®
Pentium
®
Dual-Core Desktop
Processor E2000
Δ
Series
Datasheet
March 2008
Document Number: 316981-005
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future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
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processor families. See http://www.intel.com/products/processor_number for details. Over time processor numbers will increment based on changes in
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feature. Current roadmap processor number progression is not necessarily representative of future roadmaps. See www.intel.com/products/
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Intel
®
64 requires a computer system with a processor, chipset, BIOS, operating system, device drivers, and applications enabled for Intel 64. Processor
will not operate (including 32-bit operation) without an Intel 64-enabled BIOS. Performance will vary depending on your hardware and software
configurations. See http://www.intel.com/technology/intel64/index.htm for more information including details on which processors support Intel 64, or
consult with your system vendor for more information.
Enabling Execute Disable Bit functionality requires a PC with a processor with Execute Disable Bit capability and a supporting operating system. Check
with your PC manufacturer on whether your system delivers Execute Disable Bit functionality.
The Intel
®
Pentium
®
Dual-Core Desktop processor E2000 series may contain design defects or errors known as errata which may cause the product to
deviate from published specifications.
Not all specified units of this processor support Thermal Monitor 2, Enhanced HALT State and Enhanced Intel SpeedStep® Technology. See the Processor
Spec Finder at http://processorfinder.intel.com or contact your Intel representative for more information.”
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Intel, Pentium, Intel SpeedStep, Intel Core, and the Intel logo are trademarks of Intel Corporation in the U.S. and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2007–2008 Intel Corporation.
Δ
Intel
2
Datasheet
Contents
1
Introduction
.............................................................................................................. 9
1.1
Terminology ....................................................................................................... 9
1.1.1 Processor Terminology ............................................................................ 10
1.2
References ....................................................................................................... 11
Electrical Specifications
........................................................................................... 13
2.1
Power and Ground Lands.................................................................................... 13
2.2
Decoupling Guidelines ........................................................................................ 13
2.2.1 VCC Decoupling ..................................................................................... 13
2.2.2 Vtt Decoupling ....................................................................................... 13
2.2.3 FSB Decoupling...................................................................................... 14
2.3
Voltage Identification ......................................................................................... 14
2.4
Market Segment Identification (MSID) ................................................................. 16
2.5
Reserved, Unused, and TESTHI Signals ................................................................ 16
2.6
Voltage and Current Specification ........................................................................ 17
2.6.1 Absolute Maximum and Minimum Ratings .................................................. 17
2.6.2 DC Voltage and Current Specification ........................................................ 19
2.6.3 Vcc Overshoot ....................................................................................... 21
2.6.4 Die Voltage Validation ............................................................................. 22
2.7
Signaling Specifications...................................................................................... 22
2.7.1 FSB Signal Groups.................................................................................. 23
2.7.2 CMOS and Open Drain Signals ................................................................. 24
2.7.3 Processor DC Specifications ..................................................................... 25
2.7.3.1 GTL+ Front Side Bus Specifications ............................................. 26
2.8
Clock Specifications ........................................................................................... 28
2.8.1 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking ............................ 28
2.8.2 FSB Frequency Select Signals (BSEL[2:0])................................................. 28
2.8.3 Phase Lock Loop (PLL) and Filter .............................................................. 29
2.8.4 BCLK[1:0] Specifications (CK505 based Platforms) ..................................... 29
2.8.5 BCLK[1:0] Specifications (CK410 based Platforms) ..................................... 31
2.9
PECI DC Specifications ....................................................................................... 32
Package Mechanical Specifications
.......................................................................... 33
3.1
Package Mechanical Drawing............................................................................... 33
3.2
Processor Component Keep-Out Zones ................................................................. 37
3.3
Package Loading Specifications ........................................................................... 37
3.4
Package Handling Guidelines............................................................................... 37
3.5
Package Insertion Specifications.......................................................................... 38
3.6
Processor Mass Specification ............................................................................... 38
3.7
Processor Materials............................................................................................ 38
3.8
Processor Markings............................................................................................ 38
3.9
Processor Land Coordinates ................................................................................ 39
Land Listing and Signal Descriptions
....................................................................... 41
4.1
Processor Land Assignments ............................................................................... 41
4.2
Alphabetical Signals Reference ............................................................................ 64
Thermal Specifications and Design Considerations
.................................................. 73
5.1
Processor Thermal Specifications ......................................................................... 73
5.1.1 Thermal Specifications ............................................................................ 73
5.1.2 Thermal Metrology ................................................................................. 77
5.2
Processor Thermal Features ................................................................................ 77
5.2.1 Thermal Monitor..................................................................................... 77
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3
4
5
Datasheet
3
5.3
5.4
5.2.2 Thermal Monitor 2 ..................................................................................78
5.2.3 On-Demand Mode ...................................................................................79
5.2.4 PROCHOT# Signal ..................................................................................80
5.2.5 THERMTRIP# Signal ................................................................................80
Thermal Diode...................................................................................................81
Platform Environment Control Interface (PECI) ......................................................83
5.4.1 Introduction ...........................................................................................83
5.4.1.1 Key Difference with Legacy Diode-Based Thermal Management .......83
5.4.2 PECI Specifications .................................................................................85
5.4.2.1 PECI Device Address..................................................................85
5.4.2.2 PECI Command Support .............................................................85
5.4.2.3 PECI Fault Handling Requirements ...............................................85
5.4.2.4 PECI GetTemp0() Error Code Support ..........................................85
6
Features
..................................................................................................................87
6.1
Power-On Configuration Options ..........................................................................87
6.2
Clock Control and Low Power States .....................................................................88
6.2.1 Normal State .........................................................................................88
6.2.2 HALT and Extended HALT Powerdown States ..............................................88
6.2.2.1 HALT Powerdown State ..............................................................89
6.2.2.2 Extended HALT Powerdown State ................................................89
6.2.3 Stop Grant and Extended Stop Grant States ...............................................89
6.2.3.1 Stop-Grant State.......................................................................90
6.2.3.2 Extended Stop Grant State .........................................................90
6.2.4 Extended HALT Snoop State, HALT Snoop State, Extended Stop Grant
Snoop State, and Stop Grant Snoop State..................................................90
6.2.4.1 HALT Snoop State, Stop Grant Snoop State ..................................90
6.2.4.2 Extended HALT Snoop State, Extended Stop Grant Snoop State.......91
6.3
Enhanced Intel SpeedStep® Technology ...............................................................91
Boxed Processor Specifications................................................................................93
7.1
Mechanical Specifications ....................................................................................94
7.1.1 Boxed Processor Cooling Solution Dimensions.............................................94
7.1.2 Boxed Processor Fan Heatsink Weight .......................................................96
7.1.3 Boxed Processor Retention Mechanism and Heatsink Attach Clip Assembly .....96
7.2
Electrical Requirements ......................................................................................96
7.2.1 Fan Heatsink Power Supply ......................................................................96
7.3
Thermal Specifications........................................................................................98
7.3.1 Boxed Processor Cooling Requirements......................................................98
7.3.2 Fan Speed Control Operation (Intel
®
Pentium
®
Dual-Core Desktop
Processor E2000 Series) ........................................................................ 100
Debug Tools Specifications
.................................................................................... 103
8.1
Logic Analyzer Interface (LAI) ........................................................................... 103
8.1.1 Mechanical Considerations ..................................................................... 103
8.1.2 Electrical Considerations ........................................................................ 103
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4
Datasheet
Figures
1
2
3
4
5
6
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8
9
10
11
12
13
14
15
16
17
18
19
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21
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23
24
25
26
27
28
29
30
31
V
CC
Static and Transient Tolerance for Processors......................................................... 21
V
CC
Overshoot Example Waveform ............................................................................. 22
Differential Clock Waveform ...................................................................................... 30
Differential Clock Crosspoint Specification ................................................................... 30
Differential Measurements......................................................................................... 30
Differential Clock Crosspoint Specification ................................................................... 31
Processor Package Assembly Sketch ........................................................................... 33
Processor Package Drawing Sheet 1 of 3 ..................................................................... 34
Processor Package Drawing Sheet 2 of 3 ..................................................................... 35
Processor Package Drawing Sheet 3 of 3 ..................................................................... 36
Processor Top-Side Markings Example ........................................................................ 38
Processor Land Coordinates and Quadrants, Top View ................................................... 39
land-out Diagram (Top View – Left Side) ..................................................................... 42
land-out Diagram (Top View – Right Side) ................................................................... 43
Thermal Profile (Intel
®
Pentium
®
Dual-Core Processors with CPUID = 06F2h).................. 75
Thermal Profile (Intel
®
Pentium
®
Dual-Core Processors with CPUID = 06FDh) ................. 76
Case Temperature (TC) Measurement Location ............................................................ 77
Thermal Monitor 2 Frequency and Voltage Ordering ...................................................... 79
Processor PECI Topology ........................................................................................... 83
Conceptual Fan Control on PECI-Based Platforms ......................................................... 84
Conceptual Fan Control on Thermal Diode-Based Platforms............................................ 84
Processor Low Power State Machine ........................................................................... 88
Mechanical Representation of the Boxed Processor ....................................................... 93
Space Requirements for the Boxed Processor (Side View).............................................. 94
Space Requirements for the Boxed Processor (Top View)............................................... 95
Space Requirements for the Boxed Processor (Overall View) .......................................... 95
Boxed Processor Fan Heatsink Power Cable Connector Description .................................. 97
Baseboard Power Header Placement Relative to Processor Socket ................................... 98
Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 1 view) ................... 99
Boxed Processor Fan Heatsink Airspace Keepout Requirements (Side 2 View)................... 99
Boxed Processor Fan Heatsink Set Points................................................................... 100
Datasheet
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