PHASE-LOCKED COAXIAL RESONATOR OSCILLATOR
LP SERIES: 500 – 3200 MHz
FEATURES
•
•
•
•
•
High Q ceramic resonator
L ow phase noise
Low susceptibility to vibration
Three-year warranty
100% burn-in and temperature testing
OPTIONS
• Higher output power
• 1 – 20 MHz input reference
(dual-loop design)
• Internal crystal reference
• Integrated relay alarm
• Mounting plate (specify with order)
-5 0
-6 0
-7 0
-8 0
-9 0
-1 0 0
-1 1 0
-1 2 0
-1 3 0
-1 4 0
-1 5 0
-1 6 0
-1 7 0
1 0
1 0 0
1 0 0 0
1 0 0 0 0
1 0 0 0 0 0
1 0 0 0 0 0 0
1 0 0 0 0 0 0 0
L P
S E R IE S
P H A S E
N O IS E
PHASE NOISE
F R E Q U E N C Y
O F F S E T
L P
-1 0 -7 3 0
L P -2 0 0 0
L P -3 0 9 5 -C
ELECTRICAL SPECIFICATIONS
Output frequency range
Output power
Output power variation
Phase noise
Harmonic output
Spurious output
Input reference frequency
Input power level
Input impedance
Load VSWR
DC power requirements (Notes 1 and 2)
500 – 3200 MHz
+13 dBm minimum
±1.5 dB maximum
See graphs
-20 dBc maximum
-70 dBc maximum
50 – 550 MHz (Reference Option A)
1 – 20 MHz (optional)
0 ±3 dBm
50 ohms
1.5:1 nominal
+12,+15, +20 volts @ 250 mA
Notes:
1. Add 50 mA @ +V for internal crystal reference.
2. Add 120 mA @ +V and 220 mA @ +5 volts for external 1–20 MHz reference.
WN-177692B 11/19/2007
PHASE-LOCKED COAXIAL RESONATOR OSCILLATOR
BLOCK DIAGRAM
ANALOG PHASE
DETECTOR
REFERENCE
AMPLIFIER
INPUT
REFERENCE
50 – 550 MHz
COMB
GENERATOR
OSCILLATOR
CRO: 0.5 – 3.2 GHz
COUPLED
OUTPUT
RF OUTPUT
AFC
INPUT
ACTIVE LOWPASS FILTER
ORDERING INFORMATION
Standard (input reference 50 – 550 MHz) Add B for internal reference option from table below.
LP -
Reference freq.
(MHz)
-
Output freq.
(MHz)
-
Ref. Option
-
Alarm
Option
-
Supply
Voltage
P
Optional (dual loop, input reference 1 – 20 MHz)
LP -
Input freq.
(MHz)
-
Reference freq.
(MHz)
-
Output freq.
(MHz)
-
Ref. Option
-
Alarm
Option
-
Supply
Voltage
P
REFERENCE OPTIONS
A. External reference (50–550 MHz).
B. ±5 ppm (-20 to +70°C).
Note: For Option B specify output frequency to 6 decimal
places.
1 to 20 MHz Ref. Input: (0 to +60°C).
ALARM OPTIONS
0. 0 volts in-lock, +V out-of-lock.
3. T T L L o w i n l o c k , H i g h o u t o f l o c k
4. T T L H i g h i n l o c k , L o w o u t o f l o c k
ENVIRONMENTAL SPECIFICATIONS
MECHANICAL SPECIFICATIONS
Outline drawings .......................... 165654
Weight.......................................... 250 grams nominal
RF connectors ............................. SMA female
DC connectors ............................. Feedthru filter
Temperature
Operating ...................see reference option
Storage ............................... -45 to +85°C
Humidity .................................. 95% at 40°C noncondensing
Shock (survival) ...................... 30 g’s, 10 ms pulse
Vibration (survival) .................. 20 to 2000 Hz random to 4 g’s
WN-177692B 11/19/2007
FPGA/CPLD
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