High Reliability Serial EEPROMs
High Reliability Series
EEPROMs Microwire BUS
BR93L□□-W Series, BR93A□□-WM Series, BR93H□□-WC Series
No.11001EGT03
ROHM's series of serial EEPROMs represent the highest level of reliability on the market. A double cell structure provides a
failsafe method of data reliability, while a double reset function prevents data miswriting. In addition, gold pads and gold
wires are used for internal connections, pushing the boundaries of reliability to the limit.
BR93L□□-W Series are assort 1Kbit½16Kbit. BR93A□□-WM Series are possible to operate at 105℃ and are assorted
with 1K½16Kbit. BR93H□□-WC Series are possible to operate at 125℃, are assorted with 2K½16Kbit.
Contents
BR93L□□-W Series
BR93L46-W, BR93L56-W, BR93L66-W, BR93L76-W, BR93L86-W
BR93A□□-WM Series
BR93A46-WM, BR93A56-WM, BR93A66-WM, BR93A76-WM, BR93A86-WM
・・・・P2
BR93H□□-WC Series
BR93H56-WC, BR93H66-WC, BR93H76-WC, BR93H86-WC
・・・P22
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© 2011 ROHM Co., Ltd. All rights reserved.
1/40
2011.09 - Rev.G
BR93L□□-W Series, 93A□□-WM Series, BR93H□□-WC Series
Serial EEPROM Series
Technical Note
High Reliability Series
EEPROMs Microwire BUS
BR93L□□-W Series, 93A□□-WM Series
●Description
BR93L□□-W Series, BR93A□□-WM Series are serial EEPROM of serial 3-line interface method
●Features
1) 3-line communications of chip select, serial clock, serial data input / output (the case where input and output are shared)
2) Actions available at high speed 2MHz clock(2.5~5.5V)
3) Speed write available (write time 5ms max.）
4) Same package and pin layout from 1Kbit to 16Kbit
5) 1.8~5.5V (BR93L□□-W Series), 2.5½5.5V(BR93A□□-WM Series) single power source action
6) Address auto increment function at read action
7) Write mistake prevention function
Write prohibition at power on
Write prohibition by command code
Write mistake prevention function at low voltage
8) Program cycle auto delete and auto end function
9) Program condition display by READY / BUSY
10) Low current consumption
At write action (at 5V) : 1.2mA (Typ.)
At read action (at 5V) : 0.3mA (Typ.)
At standby action (at 5V) : 0.1μA (Typ.)(CMOS input)
11) TTL compatible( input / output
s
)
12) Compact package SOP8/SOP-J8/SSOP-B8/TSSOP-B8/MSOP8/TSSOP-B8J
*1
13) Data retention for 40 years
14) Endurance up to 1,000,000 times
15) Data at shipment all addresses FFFFh
*1 Only SOP8, SOP-J8, TSSOP-B8, MSOP8 for BR93A□□-WM
●BR93L,
BR93A Series
Package type
Capacity
1Kbit
2Kbit
4Kbit
8Kbit
16Kbit
1Kbit
2Kbit
4Kbit
8Kbit
16Kbit
Bit format
64×16
128×16
256×16
512×16
1K×16
64×16
128×16
256×16
512×16
1K×16
Type
BR93L46-W
BR93L56-W
BR93L66-W
BR93L76-W
BR93L86-W
BR93A46-WM
BR93A56-WM
BR93A66-WM
BR93A76-WM
BR93A86-WM
Power source
voltage
1.8½5.5V
1.8½5.5V
1.8½5.5V
1.8½5.5V
1.8½5.5V
2.5½5.5V
2.5½5.5V
2.5½5.5V
2.5½5.5V
2.5½5.5V
SOP8
F
●
●
●
●
●
●
●
●
●
●
RF
●
●
●
●
●
●
●
●
●
●
SOP-J8
FJ
●
●
●
●
●
●
●
●
●
●
RFJ
●
●
●
●
●
●
●
●
●
●
SSOP-B8
FV
●
●
●
RFV
●
●
●
●
●
TSSOP-B8
FVT RFVT
●
●
●
●
●
●
●
●
●
●
●
●
●
MSOP8
RFVM
●
●
●
●
●
●
●
●
●
●
TSSOP-B8J
RFVJ
●
●
●
●
●
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© 2011 ROHM Co., Ltd. All rights reserved.
2/40
2011.09 - Rev.G
BR93L□□-W Series, 93A□□-WM Series, BR93H□□-WC Series
●Absolute
Maximum Ratings(Ta=25℃,BR93L□□-W)
Parameter
Symbol
Impressed voltage
VCC
Technical Note
Limits
-0.3½+6.5
450 (SOP8)
*1
Unit
V
450 (SOP-J8)
*2
Permissible dissipation
Pd
300 (SSOP-B8)
*3
330 (TSSOP-B8)
*4
310 (MSOP8)
*5
310 (TSSOP-B8J)
*6
Storage temperature range
Action temperature range
Terminal voltage
Tstg
Topr
‐
-65½+125
-40½+85
-0.3½VCC+0.3
℃
℃
V
mW
* When using at Ta=25℃ or higher, 4.5mW(*1,*2), 3.0mW(*3) 3.3mW(*4),
3.1mW(*5, 6), to be reduced per 1℃.
●Absolute
Maximum Ratings (Ta=25℃,BR93A□□-WM)
Parameter
Symbol
Impressed voltage
Permissible
dissipation
Storage temperature range
Action temperature range
Terminal voltage
VCC
Limits
-0.3½+6.5
450 (SOP8)
*1
Unit
V
Pd
450 (SOP-J8)
*2
330 (TSSOP-B8)
*3
310 (MSOP8)
*4
-65½+125
-40½+105
-0.3½VCC+0.3
mW
Tstg
Topr
‐
℃
℃
V
* When using at Ta=25℃ or higher, 4.5mW(*1,*2), 3.3mW(*3), 3.1 mW(*4) to be reduced per 1℃.
●Memory
cell characteristics (VCC=1.8½5.5V,BR93L□□-W)
Parameter
Endurance
*1
Data retention
*1
Limit
Min.
1,000,000
40
Typ.
-
-
Max.
-
-
Unit
Times
Years
Condition
Ta=25℃
Ta=25℃
○Shipment
data all address FFFFh
*1 Not 100% TESTED
●Memory
cell characteristics (VCC=2.5½5.5V,BR93A□□-WM)
Parameter
Endurance
*1
Data retention
*1
○Shipment
data all address FFFFh
*1 Not 100% TESTED
Limit
Min.
1,000,000
100,000
40
10
-
-
-
-
Typ.
Max.
Unit
Times
Years
Condition
Ta≦25℃
Ta≦105℃
Ta≦25℃
Ta≦105℃
●Recommended
action conditions (BR93L□□-W)
Parameter
Power source voltage
Input voltage
Symbol
VCC
V
IN
Limits
1.8½5.5
0½VCC
Unit
V
●Recommended
action conditions (BR93A□□-WM)
Parameter
Power source voltage
Input voltage
Symbol
VCC
V
IN
Limits
2.5½5.5
0½VCC
Unit
V
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3/40
2011.09 - Rev.G
BR93L□□-W Series, 93A□□-WM Series, BR93H□□-WC Series
Technical Note
●Electrical
characteristics
(Unless otherwise specified, VCC=2.5½5.5V, Ta=-40½+85℃, BR93L□□-W, Ta=-40½+105℃, BR93A□□-WM)
Limits
Parameter
Symbol
Unit
Condition
Min.
Typ.
Max.
“L” input voltage 1
“L” input voltage 2
“H” input voltage 1
“H” input voltage 2
“L” output voltage 1
“L” output voltage 2
“H” output voltage 1
“H” output voltage 2
Input leak current
Output leak current
Current consumption
at action
Standby current
V
IL1
V
IL2
V
IH1
V
IH2
V
OL1
V
OL2
V
OH1
V
OH2
I
LI
I
LO
I
CC1
I
CC2
I
CC3
I
SB
-0.3
-0.3
2.0
0.7 x VCC
0
0
2.4
VCC-0.2
-1
-1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+0.8
0.2 x VCC
VCC+0.3
VCC+0.3
0.4
0.2
VCC
VCC
+1
+1
3.0
1.5
4.5
2
V
V
V
V
V
V
V
V
µA
µA
mA
mA
mA
µA
4.0V≦VCC≦5.5V
VCC≦4.0V
4.0V≦VCC≦5.5V
VCC≦4.0V
I
OL
=2.1mA, 4.0V≦VCC≦5.5V
I
OL
=100μA
I
OH
=-0.4mA, 4.0V≦VCC≦5.5V
I
OH
=-100μA
V
IN
=0V½VCC
V
OUT
=0V½VCC, CS=0V
f
SK
=2MHz, t
E/W
=5ms (WRITE)
f
SK
=2MHz (READ)
f
SK
=2MHz, t
E/W
=5ms (WRAL, ERAL)
CS=0V, DO=OPEN
◎Radiation
resistance design is not made.
(Unless otherwise specified, VCC=1.8½2.5V, Ta=-40½+85℃, BR93L□□-W)
Limits
Parameter
Symbol
Unit
Min.
Typ.
Max.
“L” input voltage
“H” input voltage
“L” output voltage
“H” output voltage
Input leak current
Output leak current
Current consumption
at action
Standby current
V
IL
V
IH
V
OL
V
OH
I
LI
I
LO
I
CC1
I
CC2
I
CC3
I
SB
-0.3
0.7 x VCC
0
VCC-0.2
-1
-1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.2 x VCC
VCC+0.3
0.2
VCC
+1
+1
1.5
0.5
2
2
V
V
V
V
μA
μA
mA
mA
mA
μA
I
OL
=100μA
I
OH
=-100μA
V
IN
=0V½VCC
Condition
V
OUT
=0V½VCC, CS=0V
f
SK
=500kHz, t
E/W
=5ms (WRITE)
f
SK
=500kHz (READ)
f
SK
=500kHz, t
E/W
=5ms (WRAL, ERAL)
CS=0V, DO=OPEN
◎Radiation
resistance design is not made.
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© 2011 ROHM Co., Ltd. All rights reserved.
4/40
2011.09 - Rev.G
BR93L□□-W Series, 93A□□-WM Series, BR93H□□-WC Series
Technical Note
●Action
timing characteristics
(BR93L□□-W, Ta=-40½+85℃, VCC=2.5½5.5V, BR93A□□-WM, Ta=-40½+105℃, VCC=2.5½5.5V)
2.5V≦VCC≦5.5V
Parameter
Symbol
Unit
Min.
Typ.
Max.
SK frequency
f
SK
-
-
2
MHz
SK “H” time
t
SKH
230
-
-
ns
SK “L” time
t
SKL
230
-
-
ns
CS “L” time
t
CS
200
-
-
ns
CS setup time
t
CSS
50
-
-
ns
DI setup time
t
DIS
100
-
-
ns
CS hold time
t
CSH
0
-
-
ns
DI hold time
t
DIH
100
-
-
ns
Data “1” output delay time
t
PD1
-
-
200
ns
Data “0” output delay time
t
PD0
-
-
200
ns
Time from CS to output establishment
t
SV
-
-
150
ns
Time from CS to High-Z
t
DF
-
-
150
ns
Write cycle time
t
E/W
-
-
5
ms
(BR93L□□-W, Ta=-40½+85℃, VCC=1.8½2.5V)
Parameter
SK frequency
SK “H” time
SK “L” time
CS “L” time
CS setup time
DI setup time
CS hold time
DI hold time
Data “1” output delay time
Data “0” output delay time
Time from CS to output establishment
Time from CS to High-Z
Write cycle time
Symbol
f
SK
t
SKH
t
SKL
t
CS
t
CSS
t
DIS
t
CSH
t
DIH
t
PD1
t
PD0
t
SV
t
DF
t
E/W
1.8V≦VCC≦2.5V
Min.
Typ.
Max.
-
-
500
0.8
-
-
0.8
-
-
1
-
-
200
-
-
100
-
-
0
-
-
100
-
-
-
-
0.7
-
-
0.7
-
-
0.7
-
-
200
-
-
5
Unit
kHz
us
us
us
ns
ns
ns
ns
us
us
us
ns
ms
●Sync
data input / output timing
CS
tCSS
tSKH
tSKL
tCSH
SK
tDIS
tDI H
DI
t PD0
tPD1
DO(READ)
tDF
DO(WRITE)
STATUS VALID
Fig.1 Sync data input / output timing
○Data
is taken by DI sync with the rise of SK.
○At
read action, data is output from DO in sync with the rise of SK.
○The
status signal at write (READY / BUSY) is output after tCS from the fall of CS after write command input, at the area
DO where CS is “H”, and valid until the next command start bit is input. And, while CS is “L”, DO becomes High-Z.
○After
completion of each mode execution, set CS “L” once for internal circuit reset, and execute the following action mode.
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5/40
2011.09 - Rev.G
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